多晶硅栅极预掺杂注入对MOSFET匹配性能的影响

2011 6th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS) Pub Date : 2011-04-06 DOI:10.1109/DTIS.2011.5941437

Y. Joly, J. Delalleau, L. Lopez, J. Portal, H. Aziza, Y. Bert, F. Julien, P. Fornara

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引用次数: 1

摘要

本文论证了多晶硅栅极预掺杂注入对MOS匹配性能的影响。在测试结构(MOS对/电容器)和模拟电路上进行了测量，使用五种不同的工艺，掺杂前注入能量变化(从35到10 KeV)和倾斜变化(7°和25°)。TCAD仿真验证了由于高掺杂前注入能量导致失配退化的通道反掺杂。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Poly-Silicon gate pre-doping implantation impact on MOSFET matching performances

This paper demonstrates how poly-Silicon gate pre-doping implantation impacts MOS matching performances. Measurements are performed on test structures (MOS pairs / capacitors) and analog circuits, using five different processes with pre-doping implantation energy variation (from 35 to 10 KeV) and tilt variation (7° and 25°). TCAD simulations validate a channel counter-doping due to high pre-doping implantation energy causing mismatch degradation.

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来源期刊

2011 6th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS)

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