MOS IC逻辑电路中的电流估计

[1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers Pub Date : 1988-11-07 DOI:10.1109/ICCAD.1988.122496

S. Chowdhury, J. Barkatullah

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引用次数: 11

摘要

考虑了NMOS/CMOS IC逻辑电路在门级和宏级的电流估计。这些估算将用于可靠地设计电源和接地母线。一个精确而有效的栅极模型被用来开发算法来估计最大电流。这些算法在运行时间和解决方案质量之间进行了权衡。包括实验结果。>

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Current estimation in MOS IC logic circuits

Estimation of currents in NMOS/CMOS IC logic circuits at the gate and macro levels is considered. The estimates are to be used for reliable design of power and ground buses. An accurate and efficient model of a gate is used to develop algorithms to estimate the maximum currents. The algorithms provide a tradeoff between run time and the quality of solution. Experimental results are included.<>

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来源期刊

[1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers

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