用于高性能2.5D应用的芯片到晶圆混合键合

2022 IEEE 24th Electronics Packaging Technology Conference (EPTC) Pub Date : 2022-12-07 DOI:10.1109/EPTC56328.2022.10013161

S. Chong, Ismael Cereno Daniel, V. N. Sekhar, S. Lim, V. Srinivas

{"title":"用于高性能2.5D应用的芯片到晶圆混合键合","authors":"S. Chong, Ismael Cereno Daniel, V. N. Sekhar, S. Lim, V. Srinivas","doi":"10.1109/EPTC56328.2022.10013161","DOIUrl":null,"url":null,"abstract":"Chip to wafer hybrid bonding is the prefer choice for high performance 2.5D application as it offered very high dense I/O population down to 10¼m pitch with 5¼m pad diameter. This type of pitch and pad diameter cannot be obtained with conventional copper bump with solder cap. The conventional copper bump with solder cap had issue with solder merging, void and cracked solder. We had demonstrated good Cu-Cu interface with 10¼m pitch with 5¼m Cu pad diameter.","PeriodicalId":163034,"journal":{"name":"2022 IEEE 24th Electronics Packaging Technology Conference (EPTC)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-12-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Chip-to-Wafer Hybrid Bonding for high performance 2.5D applications\",\"authors\":\"S. Chong, Ismael Cereno Daniel, V. N. Sekhar, S. Lim, V. Srinivas\",\"doi\":\"10.1109/EPTC56328.2022.10013161\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Chip to wafer hybrid bonding is the prefer choice for high performance 2.5D application as it offered very high dense I/O population down to 10¼m pitch with 5¼m pad diameter. This type of pitch and pad diameter cannot be obtained with conventional copper bump with solder cap. The conventional copper bump with solder cap had issue with solder merging, void and cracked solder. We had demonstrated good Cu-Cu interface with 10¼m pitch with 5¼m Cu pad diameter.\",\"PeriodicalId\":163034,\"journal\":{\"name\":\"2022 IEEE 24th Electronics Packaging Technology Conference (EPTC)\",\"volume\":\"42 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-12-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE 24th Electronics Packaging Technology Conference (EPTC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EPTC56328.2022.10013161\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE 24th Electronics Packaging Technology Conference (EPTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPTC56328.2022.10013161","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 0

摘要

芯片到晶圆混合键合是高性能2.5D应用的首选，因为它提供了非常高密度的I/O人口，低至10¼m间距，5¼m焊盘直径。这种类型的间距和焊盘直径不能用传统的带焊帽的铜凸点获得。传统的带焊帽的铜凸点存在焊料合并、空洞和焊料破裂的问题。我们已经展示了10¼m间距和5¼m铜衬垫直径的良好Cu-Cu界面。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

Chip-to-Wafer Hybrid Bonding for high performance 2.5D applications

Chip to wafer hybrid bonding is the prefer choice for high performance 2.5D application as it offered very high dense I/O population down to 10¼m pitch with 5¼m pad diameter. This type of pitch and pad diameter cannot be obtained with conventional copper bump with solder cap. The conventional copper bump with solder cap had issue with solder merging, void and cracked solder. We had demonstrated good Cu-Cu interface with 10¼m pitch with 5¼m Cu pad diameter.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

2022 IEEE 24th Electronics Packaging Technology Conference (EPTC)

自引率

0.00%

发文量