An FPGA-based custom coprocessor for automatic image segmentation applications

We describe a customized computing platform we are developing to accelerate a computer vision application. An FPGA-based coprocessor solution is derived which accelerates most of the compute-intensive calculations of a template deforming image segmentation algorithm. Design issues are identified and performance results reported. The results are parameterized so that alternative solutions can be evaluated according to technological advances. We discuss how implementing such a design with available reconfigurable logic platforms can be a worthwhile tool for the development of customized FPGA-based computing solutions.<>