{"title":"基于PAL-2N电路的近阈值绝热触发器","authors":"Jianping Hu, Xiaoying Yu","doi":"10.1109/PACCS.2010.5626977","DOIUrl":null,"url":null,"abstract":"This paper presents ultra low-power adiabatic flip-flops that operate on near-threshold region. The near-threshold flip-flops are realized by PAL-2N (pass-transistor adiabatic logic with NMOS pull-down configuration) circuits. A near-threshold mode-10 counter is verified. All circuits are simulated using NCSU PDK 45nm technology by varying supply voltage from O.2V to O.9V with O.1V steps. Based on the simulation results, the adiabatic flip-flops that operate on medium-voltage region can not only keep reasonable speed but also reduce greatly energy consumptions.","PeriodicalId":431294,"journal":{"name":"2010 Second Pacific-Asia Conference on Circuits, Communications and System","volume":"55 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":"{\"title\":\"Near-threshold adiabatic flip-flops based on PAL-2N circuits in nanometer CMOS processes\",\"authors\":\"Jianping Hu, Xiaoying Yu\",\"doi\":\"10.1109/PACCS.2010.5626977\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents ultra low-power adiabatic flip-flops that operate on near-threshold region. The near-threshold flip-flops are realized by PAL-2N (pass-transistor adiabatic logic with NMOS pull-down configuration) circuits. A near-threshold mode-10 counter is verified. All circuits are simulated using NCSU PDK 45nm technology by varying supply voltage from O.2V to O.9V with O.1V steps. Based on the simulation results, the adiabatic flip-flops that operate on medium-voltage region can not only keep reasonable speed but also reduce greatly energy consumptions.\",\"PeriodicalId\":431294,\"journal\":{\"name\":\"2010 Second Pacific-Asia Conference on Circuits, Communications and System\",\"volume\":\"55 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-11-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"11\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 Second Pacific-Asia Conference on Circuits, Communications and System\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/PACCS.2010.5626977\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 Second Pacific-Asia Conference on Circuits, Communications and System","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PACCS.2010.5626977","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Near-threshold adiabatic flip-flops based on PAL-2N circuits in nanometer CMOS processes
This paper presents ultra low-power adiabatic flip-flops that operate on near-threshold region. The near-threshold flip-flops are realized by PAL-2N (pass-transistor adiabatic logic with NMOS pull-down configuration) circuits. A near-threshold mode-10 counter is verified. All circuits are simulated using NCSU PDK 45nm technology by varying supply voltage from O.2V to O.9V with O.1V steps. Based on the simulation results, the adiabatic flip-flops that operate on medium-voltage region can not only keep reasonable speed but also reduce greatly energy consumptions.
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