{"title":"一种改进的带有光输入和光输出的硅视网膜芯片","authors":"A. Titus, T. Drabik","doi":"10.1109/ASIC.1997.616984","DOIUrl":null,"url":null,"abstract":"This paper describes a unique implementation of an optical-in/optical-out focal-plane processor with improved performance and increased control over the output that uses differential difference amplifiers and a clocked-analog scheme. This is accomplished on a single chip and represents a step toward creating a low-power, compact, visual processing system.","PeriodicalId":300310,"journal":{"name":"Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334)","volume":"87 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-09-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"An improved silicon retina chip with optical input and optical output\",\"authors\":\"A. Titus, T. Drabik\",\"doi\":\"10.1109/ASIC.1997.616984\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes a unique implementation of an optical-in/optical-out focal-plane processor with improved performance and increased control over the output that uses differential difference amplifiers and a clocked-analog scheme. This is accomplished on a single chip and represents a step toward creating a low-power, compact, visual processing system.\",\"PeriodicalId\":300310,\"journal\":{\"name\":\"Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334)\",\"volume\":\"87 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1997-09-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASIC.1997.616984\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASIC.1997.616984","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An improved silicon retina chip with optical input and optical output
This paper describes a unique implementation of an optical-in/optical-out focal-plane processor with improved performance and increased control over the output that uses differential difference amplifiers and a clocked-analog scheme. This is accomplished on a single chip and represents a step toward creating a low-power, compact, visual processing system.