制造工艺诱发MOSFET阈值电压漂移的仿真及机理分析

2018 IEEE International Conference on Electron Devices and Solid State Circuits (EDSSC) Pub Date : 2018-06-01 DOI:10.1109/EDSSC.2018.8487079

Wei Gao, Pengfei Yin, Zehong Li, M. Ren, Jingping Zhang, Bo Zhang

{"title":"制造工艺诱发MOSFET阈值电压漂移的仿真及机理分析","authors":"Wei Gao, Pengfei Yin, Zehong Li, M. Ren, Jingping Zhang, Bo Zhang","doi":"10.1109/EDSSC.2018.8487079","DOIUrl":null,"url":null,"abstract":"Three problems of threshold voltage(Vth) drift of Trench-MOSFET induced by manufacturing process are discussed. From the simulation results, it can be found that the N+ source impurity compensation caused by P+ ion implantation results in a low concentration N- region, which significantly increases the threshold voltage, and the width of N- region can cause the drift rate to reach 53.3%. The channeling effect of P+ ion implantation also contributes to the threshold voltage drift up to 16.7% due to the increasing of doping concentration in p-body area. The temperature of the rapid-thermal-annealing (RTA) process of the source metal Ti/TiN layer influences the source electrode parasitic resistance, which makes the threshold voltage slightly drift up to 6.7%.","PeriodicalId":279745,"journal":{"name":"2018 IEEE International Conference on Electron Devices and Solid State Circuits (EDSSC)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Simulation and mechanism analysis of MOSFET threshold voltage drift induced by manufacturing process\",\"authors\":\"Wei Gao, Pengfei Yin, Zehong Li, M. Ren, Jingping Zhang, Bo Zhang\",\"doi\":\"10.1109/EDSSC.2018.8487079\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Three problems of threshold voltage(Vth) drift of Trench-MOSFET induced by manufacturing process are discussed. From the simulation results, it can be found that the N+ source impurity compensation caused by P+ ion implantation results in a low concentration N- region, which significantly increases the threshold voltage, and the width of N- region can cause the drift rate to reach 53.3%. The channeling effect of P+ ion implantation also contributes to the threshold voltage drift up to 16.7% due to the increasing of doping concentration in p-body area. The temperature of the rapid-thermal-annealing (RTA) process of the source metal Ti/TiN layer influences the source electrode parasitic resistance, which makes the threshold voltage slightly drift up to 6.7%.\",\"PeriodicalId\":279745,\"journal\":{\"name\":\"2018 IEEE International Conference on Electron Devices and Solid State Circuits (EDSSC)\",\"volume\":\"3 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 IEEE International Conference on Electron Devices and Solid State Circuits (EDSSC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EDSSC.2018.8487079\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE International Conference on Electron Devices and Solid State Circuits (EDSSC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDSSC.2018.8487079","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 0

摘要

讨论了由制造工艺引起的沟槽mosfet阈值电压漂移的三个问题。从仿真结果可以发现，P+离子注入引起的N+源杂质补偿导致低浓度N-区，使阈值电压显著升高，N-区宽度可使漂移率达到53.3%。P+离子注入的通道效应也导致P体区域掺杂浓度增加，阈值电压漂移达到16.7%。源金属Ti/TiN层的快速热退火(RTA)工艺温度影响源电极寄生电阻，使阈值电压轻微漂移，最高可达6.7%。

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Simulation and mechanism analysis of MOSFET threshold voltage drift induced by manufacturing process

Three problems of threshold voltage(Vth) drift of Trench-MOSFET induced by manufacturing process are discussed. From the simulation results, it can be found that the N⁺ source impurity compensation caused by P⁺ ion implantation results in a low concentration N^- region, which significantly increases the threshold voltage, and the width of N^- region can cause the drift rate to reach 53.3%. The channeling effect of P⁺ ion implantation also contributes to the threshold voltage drift up to 16.7% due to the increasing of doping concentration in p-body area. The temperature of the rapid-thermal-annealing (RTA) process of the source metal Ti/TiN layer influences the source electrode parasitic resistance, which makes the threshold voltage slightly drift up to 6.7%.

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2018 IEEE International Conference on Electron Devices and Solid State Circuits (EDSSC)

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