{"title":"基于核心设计的计算机辅助测试流程","authors":"V. Zivkovic, R. Tangelder, H. Kerkhoff","doi":"10.1109/ICMEL.2000.838790","DOIUrl":null,"url":null,"abstract":"This paper copes with the test-pattern generation and fault coverage determination in the core based design. The basic core-test strategy that one has to apply in the core-based design is stated in this work. A Computer-Aided Test (CAT) flow is proposed resulting in accurate fault coverage of embedded cores. The CAT now is applied to a few cores within the Philips Core Test Pilot IC project.","PeriodicalId":215956,"journal":{"name":"2000 22nd International Conference on Microelectronics. Proceedings (Cat. No.00TH8400)","volume":"122 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Computer-aided test flow in core-based design\",\"authors\":\"V. Zivkovic, R. Tangelder, H. Kerkhoff\",\"doi\":\"10.1109/ICMEL.2000.838790\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper copes with the test-pattern generation and fault coverage determination in the core based design. The basic core-test strategy that one has to apply in the core-based design is stated in this work. A Computer-Aided Test (CAT) flow is proposed resulting in accurate fault coverage of embedded cores. The CAT now is applied to a few cores within the Philips Core Test Pilot IC project.\",\"PeriodicalId\":215956,\"journal\":{\"name\":\"2000 22nd International Conference on Microelectronics. Proceedings (Cat. No.00TH8400)\",\"volume\":\"122 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2000 22nd International Conference on Microelectronics. Proceedings (Cat. No.00TH8400)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICMEL.2000.838790\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2000 22nd International Conference on Microelectronics. Proceedings (Cat. No.00TH8400)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICMEL.2000.838790","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This paper copes with the test-pattern generation and fault coverage determination in the core based design. The basic core-test strategy that one has to apply in the core-based design is stated in this work. A Computer-Aided Test (CAT) flow is proposed resulting in accurate fault coverage of embedded cores. The CAT now is applied to a few cores within the Philips Core Test Pilot IC project.