{"title":"故障定位与当前监控","authors":"R. Aitken","doi":"10.1109/TEST.1991.519726","DOIUrl":null,"url":null,"abstract":"Recently there has been renewed interest in fault detection in static CMOS circuits through current monitoring (“Iddq testing”). It is shown that accurate defect (diagnosis miay be performed with a combination of current and voltage observations. The proposed system combines a simple single fault model for test generation with a more realistic multiple defect model for diagnosis. ‘The associated hardware is sufficiently simple that on-board implementation is possible.","PeriodicalId":272630,"journal":{"name":"1991, Proceedings. International Test Conference","volume":"22 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"75","resultStr":"{\"title\":\"Fault Location with Current Monitoring\",\"authors\":\"R. Aitken\",\"doi\":\"10.1109/TEST.1991.519726\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Recently there has been renewed interest in fault detection in static CMOS circuits through current monitoring (“Iddq testing”). It is shown that accurate defect (diagnosis miay be performed with a combination of current and voltage observations. The proposed system combines a simple single fault model for test generation with a more realistic multiple defect model for diagnosis. ‘The associated hardware is sufficiently simple that on-board implementation is possible.\",\"PeriodicalId\":272630,\"journal\":{\"name\":\"1991, Proceedings. International Test Conference\",\"volume\":\"22 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1991-10-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"75\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1991, Proceedings. International Test Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/TEST.1991.519726\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1991, Proceedings. International Test Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TEST.1991.519726","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Recently there has been renewed interest in fault detection in static CMOS circuits through current monitoring (“Iddq testing”). It is shown that accurate defect (diagnosis miay be performed with a combination of current and voltage observations. The proposed system combines a simple single fault model for test generation with a more realistic multiple defect model for diagnosis. ‘The associated hardware is sufficiently simple that on-board implementation is possible.