{"title":"亚阈区对称双栅无结场效应晶体管的解析建模与性能分析","authors":"Raisa Fabiha, C. Saha, M. Islam","doi":"10.1109/R10-HTC.2017.8288963","DOIUrl":null,"url":null,"abstract":"In this paper, we propose a two-dimensional analytical model of single material symmetric Double Gate Stack-Oxide Junctionless Field Effect Transistor (DGS-JLFET) for subthreshold region. This model has been investigated and expected to improve subthreshold characteristics and minimize short channel effects. The characteristics of DGS-JLFET are compared with those of the single material symmetric Double Gate Junctionless Field Effect Transistor (DG-JLFET). Our proposed DGS-JLFET exhibits higher Ion/Ioff ratio, less subthreshold swing (SS) and less drain induced barrier lowering (DIBL) when compared to DG-JLFET.","PeriodicalId":411099,"journal":{"name":"2017 IEEE Region 10 Humanitarian Technology Conference (R10-HTC)","volume":"68 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Analytical modeling and performance analysis for symmetric double gate stack-oxide junctionless field effect transistor in subthreshold region\",\"authors\":\"Raisa Fabiha, C. Saha, M. Islam\",\"doi\":\"10.1109/R10-HTC.2017.8288963\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, we propose a two-dimensional analytical model of single material symmetric Double Gate Stack-Oxide Junctionless Field Effect Transistor (DGS-JLFET) for subthreshold region. This model has been investigated and expected to improve subthreshold characteristics and minimize short channel effects. The characteristics of DGS-JLFET are compared with those of the single material symmetric Double Gate Junctionless Field Effect Transistor (DG-JLFET). Our proposed DGS-JLFET exhibits higher Ion/Ioff ratio, less subthreshold swing (SS) and less drain induced barrier lowering (DIBL) when compared to DG-JLFET.\",\"PeriodicalId\":411099,\"journal\":{\"name\":\"2017 IEEE Region 10 Humanitarian Technology Conference (R10-HTC)\",\"volume\":\"68 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 IEEE Region 10 Humanitarian Technology Conference (R10-HTC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/R10-HTC.2017.8288963\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE Region 10 Humanitarian Technology Conference (R10-HTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/R10-HTC.2017.8288963","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Analytical modeling and performance analysis for symmetric double gate stack-oxide junctionless field effect transistor in subthreshold region
In this paper, we propose a two-dimensional analytical model of single material symmetric Double Gate Stack-Oxide Junctionless Field Effect Transistor (DGS-JLFET) for subthreshold region. This model has been investigated and expected to improve subthreshold characteristics and minimize short channel effects. The characteristics of DGS-JLFET are compared with those of the single material symmetric Double Gate Junctionless Field Effect Transistor (DG-JLFET). Our proposed DGS-JLFET exhibits higher Ion/Ioff ratio, less subthreshold swing (SS) and less drain induced barrier lowering (DIBL) when compared to DG-JLFET.