自适应模拟定时器片上测试

Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303) Pub Date : 1999-07-26 DOI:10.1109/MMICA.1999.833587

B. Provost, E. Sánchez-Sinencio

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引用次数: 5

摘要

介绍了一种用于片上时域模拟测试和adc的单调性和直方图测试的精确和慢速模拟坡道的实用方法。校准采用离散时间自适应方案。提出了该方法的两种实现方案;一个是连续时间，另一个是离散时间。定义了收敛准则。在低成本的2 /spl mu/m技术下的制造电路的结果与理论结果一致。

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Adaptive analog timer for on-chip testing

A practical approach for generating precise and slow analog ramps to be used for on-chip time-domain analog testing and for monotonicity and histogram test of ADCs is introduced. The calibration uses a discrete-time adaptive scheme. Two implementations of the approach are proposed; one is continuous-time and the second is discrete-time. Convergence criteria are defined. Results from a fabricated circuit in a low-cost 2 /spl mu/m technology are in agreement with theoretical results.

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Proceedings of the Third International Workshop on Design of Mixed-Mode Integrated Circuits and Applications (Cat. No.99EX303)

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