{"title":"同时耐受pvt的电压岛形成和千芯平台的磁芯放置","authors":"S. Majzoub, R. Saleh, S. Wilton, R. Ward","doi":"10.1109/SOCC.2009.5335688","DOIUrl":null,"url":null,"abstract":"In this paper, we propose a novel approach to voltage island formation and core placement for energy optimization in manycore architectures under parameter variations at pre-fabrication stage. We group the cores into irregular \"cloud-shaped\" voltage islands. The islands are created by balancing the desire to limit the spatial extent of each island, to reduce PVT impact, with the communication patterns between islands. Compared to using rectangular islands, our approach leads to power improvements between 10 and 12%.","PeriodicalId":389625,"journal":{"name":"2009 International Symposium on System-on-Chip","volume":"3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-10-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Simultaneous PVT-tolerant voltage-island formation and core placement for thousand-core platforms\",\"authors\":\"S. Majzoub, R. Saleh, S. Wilton, R. Ward\",\"doi\":\"10.1109/SOCC.2009.5335688\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, we propose a novel approach to voltage island formation and core placement for energy optimization in manycore architectures under parameter variations at pre-fabrication stage. We group the cores into irregular \\\"cloud-shaped\\\" voltage islands. The islands are created by balancing the desire to limit the spatial extent of each island, to reduce PVT impact, with the communication patterns between islands. Compared to using rectangular islands, our approach leads to power improvements between 10 and 12%.\",\"PeriodicalId\":389625,\"journal\":{\"name\":\"2009 International Symposium on System-on-Chip\",\"volume\":\"3 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-10-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 International Symposium on System-on-Chip\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOCC.2009.5335688\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 International Symposium on System-on-Chip","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOCC.2009.5335688","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Simultaneous PVT-tolerant voltage-island formation and core placement for thousand-core platforms
In this paper, we propose a novel approach to voltage island formation and core placement for energy optimization in manycore architectures under parameter variations at pre-fabrication stage. We group the cores into irregular "cloud-shaped" voltage islands. The islands are created by balancing the desire to limit the spatial extent of each island, to reduce PVT impact, with the communication patterns between islands. Compared to using rectangular islands, our approach leads to power improvements between 10 and 12%.