{"title":"超优化的y型缺陷波导,实现可靠、稳健的全光逻辑与门","authors":"Mohammad Pirzadi, A. Mir","doi":"10.1109/IRANIANCEE.2015.7146370","DOIUrl":null,"url":null,"abstract":"The reliability and robustness of two-dimensional photonic crystal (PhC) Y-defect structure is optimized. The conventional Y-defect waveguide that is widely used for realizing all-optical logical AND gate has low reliability and unwanted logical levels will appear at both input and output ports. The unreliability will lead to disrupt logical operations. Furthermore, the conventional Y-defect structure dissipates large level of the power. In our proposed structure the reliability of Y-defect-based AND gate is increased and the power consumption is decreased significantly. By utilizing Finite Difference Time Domain (FDTD) method, we demonstrate that adding some extra rods to the cross point can optimally decrease the unwanted power reflections and increase the distinction between logical levels \"0\" and \"1\". In our proposed structure, the unwanted power consumption is also minimized. Furthermore, by moving one rod at 60° bends, the performance of bends is optimally improved. This structure is easy-to-fabrication and can enhance the reliability of the optical processing system.","PeriodicalId":187121,"journal":{"name":"2015 23rd Iranian Conference on Electrical Engineering","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-07-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Ultra optimized Y-defect waveguide for realizing reliable and robust all-optical logical AND gate\",\"authors\":\"Mohammad Pirzadi, A. Mir\",\"doi\":\"10.1109/IRANIANCEE.2015.7146370\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The reliability and robustness of two-dimensional photonic crystal (PhC) Y-defect structure is optimized. The conventional Y-defect waveguide that is widely used for realizing all-optical logical AND gate has low reliability and unwanted logical levels will appear at both input and output ports. The unreliability will lead to disrupt logical operations. Furthermore, the conventional Y-defect structure dissipates large level of the power. In our proposed structure the reliability of Y-defect-based AND gate is increased and the power consumption is decreased significantly. By utilizing Finite Difference Time Domain (FDTD) method, we demonstrate that adding some extra rods to the cross point can optimally decrease the unwanted power reflections and increase the distinction between logical levels \\\"0\\\" and \\\"1\\\". In our proposed structure, the unwanted power consumption is also minimized. Furthermore, by moving one rod at 60° bends, the performance of bends is optimally improved. This structure is easy-to-fabrication and can enhance the reliability of the optical processing system.\",\"PeriodicalId\":187121,\"journal\":{\"name\":\"2015 23rd Iranian Conference on Electrical Engineering\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-07-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 23rd Iranian Conference on Electrical Engineering\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IRANIANCEE.2015.7146370\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 23rd Iranian Conference on Electrical Engineering","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IRANIANCEE.2015.7146370","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Ultra optimized Y-defect waveguide for realizing reliable and robust all-optical logical AND gate
The reliability and robustness of two-dimensional photonic crystal (PhC) Y-defect structure is optimized. The conventional Y-defect waveguide that is widely used for realizing all-optical logical AND gate has low reliability and unwanted logical levels will appear at both input and output ports. The unreliability will lead to disrupt logical operations. Furthermore, the conventional Y-defect structure dissipates large level of the power. In our proposed structure the reliability of Y-defect-based AND gate is increased and the power consumption is decreased significantly. By utilizing Finite Difference Time Domain (FDTD) method, we demonstrate that adding some extra rods to the cross point can optimally decrease the unwanted power reflections and increase the distinction between logical levels "0" and "1". In our proposed structure, the unwanted power consumption is also minimized. Furthermore, by moving one rod at 60° bends, the performance of bends is optimally improved. This structure is easy-to-fabrication and can enhance the reliability of the optical processing system.