Zhixin Wu, Yuejun Zhang, Shimin Du, Zhecheng Guo, Wanlong Zhao
{"title":"在多电阻状态ZnO忆阻器中实现的三值加法器电路","authors":"Zhixin Wu, Yuejun Zhang, Shimin Du, Zhecheng Guo, Wanlong Zhao","doi":"10.1109/ASICON52560.2021.9620275","DOIUrl":null,"url":null,"abstract":"The memristors are widely used in-memory computation due to their advantages such as high integration density, fast read/write speed, non-volatile storage and low power consumption. By adjusting the conversion between the multi-resistance states of the memristor, the ternary logic with larger information processing capacity can be realized with simple operation and circuit design. In this paper, we fabricated a Pt/ZnO/Pt memristor, which shows the characteristics of multi-resistance states conversion in multiple cycle operations, further realized the complete set of ternary logic based on the ZnO-based memristor, and designed a three-valued adder unit circuit with potential application value of full memristor. The result shows that the function of a three-valued adder can be realized by using five memristors. Compared with the traditional CMOS circuit, the three-valued adder unit circuit based on memristor reduces the number of components by one third. This approach is helpful for building future high-performance computer architectures.","PeriodicalId":233584,"journal":{"name":"2021 IEEE 14th International Conference on ASIC (ASICON)","volume":"103 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A Three-valued Adder Circuit Implemented in ZnO Memristor with Multi-resistance States\",\"authors\":\"Zhixin Wu, Yuejun Zhang, Shimin Du, Zhecheng Guo, Wanlong Zhao\",\"doi\":\"10.1109/ASICON52560.2021.9620275\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The memristors are widely used in-memory computation due to their advantages such as high integration density, fast read/write speed, non-volatile storage and low power consumption. By adjusting the conversion between the multi-resistance states of the memristor, the ternary logic with larger information processing capacity can be realized with simple operation and circuit design. In this paper, we fabricated a Pt/ZnO/Pt memristor, which shows the characteristics of multi-resistance states conversion in multiple cycle operations, further realized the complete set of ternary logic based on the ZnO-based memristor, and designed a three-valued adder unit circuit with potential application value of full memristor. The result shows that the function of a three-valued adder can be realized by using five memristors. Compared with the traditional CMOS circuit, the three-valued adder unit circuit based on memristor reduces the number of components by one third. This approach is helpful for building future high-performance computer architectures.\",\"PeriodicalId\":233584,\"journal\":{\"name\":\"2021 IEEE 14th International Conference on ASIC (ASICON)\",\"volume\":\"103 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-10-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 IEEE 14th International Conference on ASIC (ASICON)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASICON52560.2021.9620275\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE 14th International Conference on ASIC (ASICON)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASICON52560.2021.9620275","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Three-valued Adder Circuit Implemented in ZnO Memristor with Multi-resistance States
The memristors are widely used in-memory computation due to their advantages such as high integration density, fast read/write speed, non-volatile storage and low power consumption. By adjusting the conversion between the multi-resistance states of the memristor, the ternary logic with larger information processing capacity can be realized with simple operation and circuit design. In this paper, we fabricated a Pt/ZnO/Pt memristor, which shows the characteristics of multi-resistance states conversion in multiple cycle operations, further realized the complete set of ternary logic based on the ZnO-based memristor, and designed a three-valued adder unit circuit with potential application value of full memristor. The result shows that the function of a three-valued adder can be realized by using five memristors. Compared with the traditional CMOS circuit, the three-valued adder unit circuit based on memristor reduces the number of components by one third. This approach is helpful for building future high-performance computer architectures.