创新实践环节7C:自校准和微调

Chen-Yong Cher, Y. Makris, C. Thibeault, A. Drake
{"title":"创新实践环节7C:自校准和微调","authors":"Chen-Yong Cher, Y. Makris, C. Thibeault, A. Drake","doi":"10.1109/VTS.2013.6548919","DOIUrl":null,"url":null,"abstract":"Critical Path Monitors (CPM) are a way of modeling the frequency response of a microprocessor to voltage, environment, workload, and other operating point changes. When coupled with a frequency controller, the CPM gives the microprocessor the ability to adjust its frequency to match the current operating environment. This allows for more efficient designs since voltage and frequency margins required to compensate for voltage droops, di/dt events, temperature changes, and other noise events are no longer needed. Calibration is key to functional Critical Path Monitors. Calibration compensates for process variation and pulls the CPM in-line with the hardware it is controlling. In this talk the CPM, frequency control loop, and calibration methodology of the Power7+ microprocessor is described. The CPM models frequency response well enough, after calibration, to allow for a 22% margin reduction. Our measurements demonstrate the value of the CPM for modeling frequency response that can be applied to DVFS microprocessors with the potential to reduce development and test times and to make systems more resilient.","PeriodicalId":138435,"journal":{"name":"2013 IEEE 31st VLSI Test Symposium (VTS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-04-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Innovative practices session 7C: Self-calibration & trimming\",\"authors\":\"Chen-Yong Cher, Y. Makris, C. Thibeault, A. Drake\",\"doi\":\"10.1109/VTS.2013.6548919\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Critical Path Monitors (CPM) are a way of modeling the frequency response of a microprocessor to voltage, environment, workload, and other operating point changes. When coupled with a frequency controller, the CPM gives the microprocessor the ability to adjust its frequency to match the current operating environment. This allows for more efficient designs since voltage and frequency margins required to compensate for voltage droops, di/dt events, temperature changes, and other noise events are no longer needed. Calibration is key to functional Critical Path Monitors. Calibration compensates for process variation and pulls the CPM in-line with the hardware it is controlling. In this talk the CPM, frequency control loop, and calibration methodology of the Power7+ microprocessor is described. The CPM models frequency response well enough, after calibration, to allow for a 22% margin reduction. Our measurements demonstrate the value of the CPM for modeling frequency response that can be applied to DVFS microprocessors with the potential to reduce development and test times and to make systems more resilient.\",\"PeriodicalId\":138435,\"journal\":{\"name\":\"2013 IEEE 31st VLSI Test Symposium (VTS)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-04-29\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 IEEE 31st VLSI Test Symposium (VTS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VTS.2013.6548919\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE 31st VLSI Test Symposium (VTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VTS.2013.6548919","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

摘要

关键路径监视器(CPM)是一种模拟微处理器对电压、环境、工作负载和其他工作点变化的频率响应的方法。当与频率控制器耦合时,CPM使微处理器能够调整其频率以匹配当前的操作环境。这允许更高效的设计,因为不再需要补偿电压下降、di/dt事件、温度变化和其他噪声事件所需的电压和频率裕度。校准是关键路径监视器功能的关键。校准补偿过程变化,并使CPM与它所控制的硬件保持一致。在这次演讲中,介绍了Power7+微处理器的CPM、频率控制回路和校准方法。CPM模型的频率响应足够好,校正后,允许22%的余量减少。我们的测量证明了CPM在建模频率响应方面的价值,可以应用于DVFS微处理器,有可能减少开发和测试时间,并使系统更具弹性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Innovative practices session 7C: Self-calibration & trimming
Critical Path Monitors (CPM) are a way of modeling the frequency response of a microprocessor to voltage, environment, workload, and other operating point changes. When coupled with a frequency controller, the CPM gives the microprocessor the ability to adjust its frequency to match the current operating environment. This allows for more efficient designs since voltage and frequency margins required to compensate for voltage droops, di/dt events, temperature changes, and other noise events are no longer needed. Calibration is key to functional Critical Path Monitors. Calibration compensates for process variation and pulls the CPM in-line with the hardware it is controlling. In this talk the CPM, frequency control loop, and calibration methodology of the Power7+ microprocessor is described. The CPM models frequency response well enough, after calibration, to allow for a 22% margin reduction. Our measurements demonstrate the value of the CPM for modeling frequency response that can be applied to DVFS microprocessors with the potential to reduce development and test times and to make systems more resilient.
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