{"title":"高速AGTL+输出缓冲器的设计","authors":"Donglin Wang, Shaoqing Li, Zhenyu Zhao","doi":"10.1109/ICASIC.2005.1611404","DOIUrl":null,"url":null,"abstract":"AGTL+ (assisted Gunning transceiver logic+) signal transmission and interface technology are analyzed in this paper. To resolve the problem on such short high-level duration time in traditional design, we have proposed an auxiliary charged circuit structure. According to what I have analyzed, we design and realize an AGTL+ interface circuit, which is completely compatible with Itanium 2 interface and has high-speed and high noise margin. The operating frequency of circuit reaches to 500MHz by SPICE simulation in the condition of 0.18mum standard CMOS process","PeriodicalId":431034,"journal":{"name":"2005 6th International Conference on ASIC","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A design of high speed AGTL+ output buffer\",\"authors\":\"Donglin Wang, Shaoqing Li, Zhenyu Zhao\",\"doi\":\"10.1109/ICASIC.2005.1611404\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"AGTL+ (assisted Gunning transceiver logic+) signal transmission and interface technology are analyzed in this paper. To resolve the problem on such short high-level duration time in traditional design, we have proposed an auxiliary charged circuit structure. According to what I have analyzed, we design and realize an AGTL+ interface circuit, which is completely compatible with Itanium 2 interface and has high-speed and high noise margin. The operating frequency of circuit reaches to 500MHz by SPICE simulation in the condition of 0.18mum standard CMOS process\",\"PeriodicalId\":431034,\"journal\":{\"name\":\"2005 6th International Conference on ASIC\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2005-10-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2005 6th International Conference on ASIC\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICASIC.2005.1611404\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2005 6th International Conference on ASIC","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICASIC.2005.1611404","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
AGTL+ (assisted Gunning transceiver logic+) signal transmission and interface technology are analyzed in this paper. To resolve the problem on such short high-level duration time in traditional design, we have proposed an auxiliary charged circuit structure. According to what I have analyzed, we design and realize an AGTL+ interface circuit, which is completely compatible with Itanium 2 interface and has high-speed and high noise margin. The operating frequency of circuit reaches to 500MHz by SPICE simulation in the condition of 0.18mum standard CMOS process
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