{"title":"一种低功耗的片上线性调节器,由开关电容辅助,用于快速瞬态调节","authors":"Suming Lai, Peng Li","doi":"10.1109/ISQED.2013.6523684","DOIUrl":null,"url":null,"abstract":"This paper presents an output-capacitorless low-dropout voltage regulator designed in a commercial 90nm CMOS technology for low-voltage applications. The power efficiency of the regulator is enhanced by significantly reducing its dropout voltage and quiescent current consumption. The resultant degradation of its transient regulation performance is compensated by a novel auxiliary circuit using switched-capacitor technique. The regulator operates under 1V supply voltage with a 0.9V output and delivers a maximum DC current of 100mA. The power efficiency under the full-load condition is about 90% and under the light-load condition (1mA load current) it maintains above 86%. For transient performance, when a 100mA load current step with 5ns rise/fall time is applied, the output voltage droop and overshoot are both within 10% of the steady-state value, while it would exceed 40% without the auxiliary circuit. Monte Carlo and temperature-sweep simulation results show that the LDO is robust to process and temperature variations and device mismatches.","PeriodicalId":127115,"journal":{"name":"International Symposium on Quality Electronic Design (ISQED)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-03-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A power-efficient on-chip linear regulator assisted by switched capacitors for fast transient regulation\",\"authors\":\"Suming Lai, Peng Li\",\"doi\":\"10.1109/ISQED.2013.6523684\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents an output-capacitorless low-dropout voltage regulator designed in a commercial 90nm CMOS technology for low-voltage applications. The power efficiency of the regulator is enhanced by significantly reducing its dropout voltage and quiescent current consumption. The resultant degradation of its transient regulation performance is compensated by a novel auxiliary circuit using switched-capacitor technique. The regulator operates under 1V supply voltage with a 0.9V output and delivers a maximum DC current of 100mA. The power efficiency under the full-load condition is about 90% and under the light-load condition (1mA load current) it maintains above 86%. For transient performance, when a 100mA load current step with 5ns rise/fall time is applied, the output voltage droop and overshoot are both within 10% of the steady-state value, while it would exceed 40% without the auxiliary circuit. Monte Carlo and temperature-sweep simulation results show that the LDO is robust to process and temperature variations and device mismatches.\",\"PeriodicalId\":127115,\"journal\":{\"name\":\"International Symposium on Quality Electronic Design (ISQED)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-03-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"International Symposium on Quality Electronic Design (ISQED)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISQED.2013.6523684\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Symposium on Quality Electronic Design (ISQED)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISQED.2013.6523684","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A power-efficient on-chip linear regulator assisted by switched capacitors for fast transient regulation
This paper presents an output-capacitorless low-dropout voltage regulator designed in a commercial 90nm CMOS technology for low-voltage applications. The power efficiency of the regulator is enhanced by significantly reducing its dropout voltage and quiescent current consumption. The resultant degradation of its transient regulation performance is compensated by a novel auxiliary circuit using switched-capacitor technique. The regulator operates under 1V supply voltage with a 0.9V output and delivers a maximum DC current of 100mA. The power efficiency under the full-load condition is about 90% and under the light-load condition (1mA load current) it maintains above 86%. For transient performance, when a 100mA load current step with 5ns rise/fall time is applied, the output voltage droop and overshoot are both within 10% of the steady-state value, while it would exceed 40% without the auxiliary circuit. Monte Carlo and temperature-sweep simulation results show that the LDO is robust to process and temperature variations and device mismatches.