{"title":"用于60 ghz收发器的15至18 ghz可编程子整数频率合成器","authors":"B. Floyd","doi":"10.1109/RFIC.2007.380939","DOIUrl":null,"url":null,"abstract":"A 15 to 18-GHz frequency synthesizer is implemented in 0.13-mum SiGe BiCMOS technology as part of a 60-GHz transceiver chipset. It provides for RF channels of 56.5-64 GHz in 500-MHz steps, and features a phase-rotating multi-modulus divider capable of sub-integer division. Output frequency range from the synthesizer is 15.3 to 18 GHz. The measured RMS phase noise of the synthesizer is 0.9deg (1 MHz to 1 GHz integration), while phase noise at 100-kHz and 10-MHz offsets are -90 and -124 dBc/Hz, respectively. Reference spurs are -69 dBc; sub-integer spurs are -65 dBc; and power consumption is 145 mW.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"38 10 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"17","resultStr":"{\"title\":\"A 15 to 18-GHz Programmable Sub-Integer Frequency Synthesizer for a 60-GHz Transceiver\",\"authors\":\"B. Floyd\",\"doi\":\"10.1109/RFIC.2007.380939\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 15 to 18-GHz frequency synthesizer is implemented in 0.13-mum SiGe BiCMOS technology as part of a 60-GHz transceiver chipset. It provides for RF channels of 56.5-64 GHz in 500-MHz steps, and features a phase-rotating multi-modulus divider capable of sub-integer division. Output frequency range from the synthesizer is 15.3 to 18 GHz. The measured RMS phase noise of the synthesizer is 0.9deg (1 MHz to 1 GHz integration), while phase noise at 100-kHz and 10-MHz offsets are -90 and -124 dBc/Hz, respectively. Reference spurs are -69 dBc; sub-integer spurs are -65 dBc; and power consumption is 145 mW.\",\"PeriodicalId\":356468,\"journal\":{\"name\":\"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium\",\"volume\":\"38 10 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-06-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"17\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RFIC.2007.380939\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.2007.380939","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 15 to 18-GHz Programmable Sub-Integer Frequency Synthesizer for a 60-GHz Transceiver
A 15 to 18-GHz frequency synthesizer is implemented in 0.13-mum SiGe BiCMOS technology as part of a 60-GHz transceiver chipset. It provides for RF channels of 56.5-64 GHz in 500-MHz steps, and features a phase-rotating multi-modulus divider capable of sub-integer division. Output frequency range from the synthesizer is 15.3 to 18 GHz. The measured RMS phase noise of the synthesizer is 0.9deg (1 MHz to 1 GHz integration), while phase noise at 100-kHz and 10-MHz offsets are -90 and -124 dBc/Hz, respectively. Reference spurs are -69 dBc; sub-integer spurs are -65 dBc; and power consumption is 145 mW.