{"title":"半导体元件系统级ESD测试的最佳实践","authors":"K. Muhonen","doi":"10.1109/CSICS.2013.6659220","DOIUrl":null,"url":null,"abstract":"Electrostatic discharge (ESD) testing of integrated circuits (ICs) is necessary to ensure products can withstand several types of ESD threats including those encountered in the factory and in the field. This paper discusses the testing of components with electrostatic stress waveforms that were originally designed for predicting system failures in the field. IC manufacturers are struggling to obtain reliable data when applying system tests to their components because of interface, implementation and equipment repeatability problems found with this form of evaluation. This paper highlights the best practices for system level ESD testing despite these hurdles.","PeriodicalId":257256,"journal":{"name":"2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Best Practices for System Level ESD Testing of Semiconductor Components\",\"authors\":\"K. Muhonen\",\"doi\":\"10.1109/CSICS.2013.6659220\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Electrostatic discharge (ESD) testing of integrated circuits (ICs) is necessary to ensure products can withstand several types of ESD threats including those encountered in the factory and in the field. This paper discusses the testing of components with electrostatic stress waveforms that were originally designed for predicting system failures in the field. IC manufacturers are struggling to obtain reliable data when applying system tests to their components because of interface, implementation and equipment repeatability problems found with this form of evaluation. This paper highlights the best practices for system level ESD testing despite these hurdles.\",\"PeriodicalId\":257256,\"journal\":{\"name\":\"2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-11-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CSICS.2013.6659220\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CSICS.2013.6659220","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Best Practices for System Level ESD Testing of Semiconductor Components
Electrostatic discharge (ESD) testing of integrated circuits (ICs) is necessary to ensure products can withstand several types of ESD threats including those encountered in the factory and in the field. This paper discusses the testing of components with electrostatic stress waveforms that were originally designed for predicting system failures in the field. IC manufacturers are struggling to obtain reliable data when applying system tests to their components because of interface, implementation and equipment repeatability problems found with this form of evaluation. This paper highlights the best practices for system level ESD testing despite these hurdles.