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引用次数: 12
摘要
提出了一种防止热载流子退化的混合电压I/O缓冲电路设计方法。混合电压(2timesVDD耐受)I/O缓冲器在0.18 μ m CMOS工艺中设计了热载流子防止电路，以接收3.3 v (2timesVDD耐受)输入信号，而不会受到栅氧化可靠性，电路泄漏问题和热载流子退化的影响。在实验芯片中，所提出的混合电压I/O缓冲器可以以高达266mhz的信号速度工作，完全可以满足PCI-X 2.0的应用。
Design on Mixed-Voltage I/O Buffers with Consideration of Hot-Carrier Reliability
A new circuit design for mixed-voltage I/O buffers to prevent hot-carrier degradation is proposed. The mixed-voltage (2timesVDD tolerant) I/O buffer is designed with hot-carrier-prevented circuits in a 0.18-mum CMOS process to receive 3.3-V (2timesVDD tolerant) input signals without suffering gate-oxide reliability, circuit leakage issues, and hot-carrier degradation. In the experimental chip, the proposed mixed-voltage I/O buffer can be operated with signal speed of up to 266 MHz, which can fully meet the applications of PCI-X 2.0.
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