Encapsulation Of Flip Chip Structures

Flip chip technology, applied to printed wire board substrates, offers a minimization of IC package size on conventional, low cost assemblies as well as a reduction in interconnect inductance. Extensive mechanical fatigue of flip chip interconnects during thermal cycling is of critical concern due to the severe thermal expansion rate mismatch between the silicon die and typical organic substrates. In this study, an extensive thermomechanical finite element analysis of flip chip assemblies suggests that the thermal cycle reliability of the interconnections can be dramatically enhanced through the introduction of a rigid encapsulant layer between the chip and the substrate. Through an understanding of the mechanics of the assembly, the effects of geometrical design and material properties on interconnect thermal cycle performance and induced stress on the silicon device were predicted. Based on thew results, a flip chip structure employing a conventional FR4 substrate was constructed and was found to have exceptional thermal cycle reliability. An analysis of material requirements and proces!;ing constraints is also presented.