{"title":"可封装性设计——键合技术对超大规模集成电路芯片尺寸和布局的影响","authors":"P. Dehkordi, D. Bouldin","doi":"10.1109/MCMC.1993.302135","DOIUrl":null,"url":null,"abstract":"The impact of bonding technology from an IC designer's point of view is studied. Work by others has concentrated just on the effect of packaging alone, whereas this study investigates the effect of changing the VLSI dies. Specifically, the impact of wire-bond and flip-chip technologies on the size and layout of VLSI dies is demonstrated by means of general discussion and detailed examples. Three VLSI chips of various sizes and I/O requirements have been synthesized based on a standard-cell library for both wire-bond and flip-chip. The results show different die layouts and sizes can be achieved based on the choice of wire-bond or flip-chip technologies.<<ETX>>","PeriodicalId":143140,"journal":{"name":"Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93","volume":"15 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1993-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"26","resultStr":"{\"title\":\"Design for packageability-the impact of bonding technology on the size and layout of VLSI dies\",\"authors\":\"P. Dehkordi, D. Bouldin\",\"doi\":\"10.1109/MCMC.1993.302135\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The impact of bonding technology from an IC designer's point of view is studied. Work by others has concentrated just on the effect of packaging alone, whereas this study investigates the effect of changing the VLSI dies. Specifically, the impact of wire-bond and flip-chip technologies on the size and layout of VLSI dies is demonstrated by means of general discussion and detailed examples. Three VLSI chips of various sizes and I/O requirements have been synthesized based on a standard-cell library for both wire-bond and flip-chip. The results show different die layouts and sizes can be achieved based on the choice of wire-bond or flip-chip technologies.<<ETX>>\",\"PeriodicalId\":143140,\"journal\":{\"name\":\"Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93\",\"volume\":\"15 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1993-03-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"26\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MCMC.1993.302135\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings 1993 IEEE Multi-Chip Module Conference MCMC-93","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MCMC.1993.302135","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design for packageability-the impact of bonding technology on the size and layout of VLSI dies
The impact of bonding technology from an IC designer's point of view is studied. Work by others has concentrated just on the effect of packaging alone, whereas this study investigates the effect of changing the VLSI dies. Specifically, the impact of wire-bond and flip-chip technologies on the size and layout of VLSI dies is demonstrated by means of general discussion and detailed examples. Three VLSI chips of various sizes and I/O requirements have been synthesized based on a standard-cell library for both wire-bond and flip-chip. The results show different die layouts and sizes can be achieved based on the choice of wire-bond or flip-chip technologies.<>