{"title":"带可调伪电阻的神经记录放大器的设计","authors":"Kai-Wen Yao, C. Gong, Shan-Ci Yang, M. Shiue","doi":"10.1109/SOCC.2011.6085119","DOIUrl":null,"url":null,"abstract":"This paper describes a voltage-controlled pseudo-resistor with widely available operating voltage range applied to neural recording amplifier designs. The proposed pseudo-resistor which consists of serial-connected PMOS device and an auto-tuning circuit provides ultra-high resistance to cancel DC offset from electrode-electrolyte interface. The proposed design has been estimated in standard CMOS 0.18-µm process, achieving midband gain of 40 dB, bandwidth from 0.4 Hz to 7 kHz, input-referred noise of 5.98 µVrms, calculated NEF of 7.2, and 3.1-µW power consumption.","PeriodicalId":365422,"journal":{"name":"2011 IEEE International SOC Conference","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2011-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"Design of a neural recording amplifier with tunable pseudo resistors\",\"authors\":\"Kai-Wen Yao, C. Gong, Shan-Ci Yang, M. Shiue\",\"doi\":\"10.1109/SOCC.2011.6085119\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes a voltage-controlled pseudo-resistor with widely available operating voltage range applied to neural recording amplifier designs. The proposed pseudo-resistor which consists of serial-connected PMOS device and an auto-tuning circuit provides ultra-high resistance to cancel DC offset from electrode-electrolyte interface. The proposed design has been estimated in standard CMOS 0.18-µm process, achieving midband gain of 40 dB, bandwidth from 0.4 Hz to 7 kHz, input-referred noise of 5.98 µVrms, calculated NEF of 7.2, and 3.1-µW power consumption.\",\"PeriodicalId\":365422,\"journal\":{\"name\":\"2011 IEEE International SOC Conference\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-11-21\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 IEEE International SOC Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOCC.2011.6085119\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE International SOC Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOCC.2011.6085119","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design of a neural recording amplifier with tunable pseudo resistors
This paper describes a voltage-controlled pseudo-resistor with widely available operating voltage range applied to neural recording amplifier designs. The proposed pseudo-resistor which consists of serial-connected PMOS device and an auto-tuning circuit provides ultra-high resistance to cancel DC offset from electrode-electrolyte interface. The proposed design has been estimated in standard CMOS 0.18-µm process, achieving midband gain of 40 dB, bandwidth from 0.4 Hz to 7 kHz, input-referred noise of 5.98 µVrms, calculated NEF of 7.2, and 3.1-µW power consumption.
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