{"title":"基于DPCM图像压缩技术的SLAM应用流特征提取加速器","authors":"Zhiyuan Wang, Zhuo Zhang, Haowen Chen","doi":"10.1109/ASICON52560.2021.9620342","DOIUrl":null,"url":null,"abstract":"The extraction of feature points plays a significant role in simultaneous localization and mapping (SLAM) applications. However, in the streaming architecture of the feature extraction, sizable row buffers are required to store data, usually occupying a large proportion of the hardware area. To ameliorate this problem, in this paper, we propose a streaming feature extraction architecture with narrower row buffers, combined with the differential pulse-code modulation (DPCM) image compression technique. Meanwhile, we improve the data flow to omit the compressions and decompressions in the critical data path by employing a novel strategy of transposing DPCM decompression and linear operation (TDDLO). Moreover, the calculations are further simplified by introducing an approximate algorithm of the rotation calculation. Consequently, the hardware costs are notably saved, while the impact of DPCM compression on power, latency, and accuracy is mitigated. The experimental results reveal at least a 32% reduction in memory compared with state-of-the-art architectures. Simulated by TSMC 28nm CMOS technology, the proposed architecture can process full-HD (1920×1080) images at 241 fps and consume only 52.7 mW power, while the normalized absolute trajectory error increases slightly by 0.2% on the TUM dataset.","PeriodicalId":233584,"journal":{"name":"2021 IEEE 14th International Conference on ASIC (ASICON)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Streaming Feature Extraction Accelerator using DPCM Image Compression Technique for SLAM Applications\",\"authors\":\"Zhiyuan Wang, Zhuo Zhang, Haowen Chen\",\"doi\":\"10.1109/ASICON52560.2021.9620342\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The extraction of feature points plays a significant role in simultaneous localization and mapping (SLAM) applications. However, in the streaming architecture of the feature extraction, sizable row buffers are required to store data, usually occupying a large proportion of the hardware area. To ameliorate this problem, in this paper, we propose a streaming feature extraction architecture with narrower row buffers, combined with the differential pulse-code modulation (DPCM) image compression technique. Meanwhile, we improve the data flow to omit the compressions and decompressions in the critical data path by employing a novel strategy of transposing DPCM decompression and linear operation (TDDLO). Moreover, the calculations are further simplified by introducing an approximate algorithm of the rotation calculation. Consequently, the hardware costs are notably saved, while the impact of DPCM compression on power, latency, and accuracy is mitigated. The experimental results reveal at least a 32% reduction in memory compared with state-of-the-art architectures. Simulated by TSMC 28nm CMOS technology, the proposed architecture can process full-HD (1920×1080) images at 241 fps and consume only 52.7 mW power, while the normalized absolute trajectory error increases slightly by 0.2% on the TUM dataset.\",\"PeriodicalId\":233584,\"journal\":{\"name\":\"2021 IEEE 14th International Conference on ASIC (ASICON)\",\"volume\":\"39 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-10-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 IEEE 14th International Conference on ASIC (ASICON)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASICON52560.2021.9620342\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE 14th International Conference on ASIC (ASICON)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASICON52560.2021.9620342","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Streaming Feature Extraction Accelerator using DPCM Image Compression Technique for SLAM Applications
The extraction of feature points plays a significant role in simultaneous localization and mapping (SLAM) applications. However, in the streaming architecture of the feature extraction, sizable row buffers are required to store data, usually occupying a large proportion of the hardware area. To ameliorate this problem, in this paper, we propose a streaming feature extraction architecture with narrower row buffers, combined with the differential pulse-code modulation (DPCM) image compression technique. Meanwhile, we improve the data flow to omit the compressions and decompressions in the critical data path by employing a novel strategy of transposing DPCM decompression and linear operation (TDDLO). Moreover, the calculations are further simplified by introducing an approximate algorithm of the rotation calculation. Consequently, the hardware costs are notably saved, while the impact of DPCM compression on power, latency, and accuracy is mitigated. The experimental results reveal at least a 32% reduction in memory compared with state-of-the-art architectures. Simulated by TSMC 28nm CMOS technology, the proposed architecture can process full-HD (1920×1080) images at 241 fps and consume only 52.7 mW power, while the normalized absolute trajectory error increases slightly by 0.2% on the TUM dataset.