K. Matsuura, M. Hamada, T. Hamada, H. Tanigawa, T. Sakamoto, W. Cao, K. Parto, A. Hori, I. Muneta, T. Kawanago, K. Kakushima, K. Tsutsui, A. Ogura, K. Banerjee, H. Wakabayashi
{"title":"用硫粉退火和ALD Al2O3栅极介电体制备的mossi2触点常关溅射非misfet","authors":"K. Matsuura, M. Hamada, T. Hamada, H. Tanigawa, T. Sakamoto, W. Cao, K. Parto, A. Hori, I. Muneta, T. Kawanago, K. Kakushima, K. Tsutsui, A. Ogura, K. Banerjee, H. Wakabayashi","doi":"10.23919/IWJT.2019.8802622","DOIUrl":null,"url":null,"abstract":"We have successfully fabricated chip-level integrated nMISFETs with sputtered molybdenum disulfide (MoS2) thin channel using sulfur-powder annealing (SPA) and molybdenum disilicide (MoSi2) contact which show n-type-normally-off operation in accumulation. SPA intentionally compensated sulfur vacancies of sputtered MoS2 film. Eventually, we achieved a normally-off operation, which realizes industrial chip-level LSIs with MoS2 channel.","PeriodicalId":441279,"journal":{"name":"2019 19th International Workshop on Junction Technology (IWJT)","volume":"49 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Normally-Off Sputtered-MoS2 nMISFETs with MoSi2 Contact by Sulfur Powder Annealing and ALD Al2O3 Gate Dielectric for Chip Level Integration\",\"authors\":\"K. Matsuura, M. Hamada, T. Hamada, H. Tanigawa, T. Sakamoto, W. Cao, K. Parto, A. Hori, I. Muneta, T. Kawanago, K. Kakushima, K. Tsutsui, A. Ogura, K. Banerjee, H. Wakabayashi\",\"doi\":\"10.23919/IWJT.2019.8802622\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We have successfully fabricated chip-level integrated nMISFETs with sputtered molybdenum disulfide (MoS2) thin channel using sulfur-powder annealing (SPA) and molybdenum disilicide (MoSi2) contact which show n-type-normally-off operation in accumulation. SPA intentionally compensated sulfur vacancies of sputtered MoS2 film. Eventually, we achieved a normally-off operation, which realizes industrial chip-level LSIs with MoS2 channel.\",\"PeriodicalId\":441279,\"journal\":{\"name\":\"2019 19th International Workshop on Junction Technology (IWJT)\",\"volume\":\"49 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-06-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 19th International Workshop on Junction Technology (IWJT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.23919/IWJT.2019.8802622\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 19th International Workshop on Junction Technology (IWJT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/IWJT.2019.8802622","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Normally-Off Sputtered-MoS2 nMISFETs with MoSi2 Contact by Sulfur Powder Annealing and ALD Al2O3 Gate Dielectric for Chip Level Integration
We have successfully fabricated chip-level integrated nMISFETs with sputtered molybdenum disulfide (MoS2) thin channel using sulfur-powder annealing (SPA) and molybdenum disilicide (MoSi2) contact which show n-type-normally-off operation in accumulation. SPA intentionally compensated sulfur vacancies of sputtered MoS2 film. Eventually, we achieved a normally-off operation, which realizes industrial chip-level LSIs with MoS2 channel.