多模可重构模拟基带与I/Q校准用于GNSS接收机

Zheng Song, Nan Qi, B. Chi, Zhihua Wang
{"title":"多模可重构模拟基带与I/Q校准用于GNSS接收机","authors":"Zheng Song, Nan Qi, B. Chi, Zhihua Wang","doi":"10.1109/ASPDAC.2014.6742858","DOIUrl":null,"url":null,"abstract":"A multi-mode reconfigurable analog baseband with I/Q calibration for GNSS receivers is presented. The baseband circuit consists of an I/Q calibration circuit, a reconfigurable complex band-pass filter (C-BPF) and an AGC loop. It provides I/Q mismatch auto-calibration with the aid of a FPGA. The 3rd/ 5th-order reconfigurable C-BPF supports various bandwidths from 2.2 to 10 MHz and with different center frequencies from 3.996 to 16 MHz. The AGC loop features 5-50 dB gain range and 1 dB step, and digital AGC algorithms. The auto DC-offset cancellation is also integrated on-chip. The analog baseband circuit has been implemented in 180 nm CMOS and consumes 6.5-13 mA variable current thanks to the power scaling technique. The measured image-rejection ratio is 45-55 dB, improved by 22 dB after I/Q calibration.","PeriodicalId":234635,"journal":{"name":"2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-02-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A multi-mode reconfigurable analog baseband with I/Q calibration for GNSS receivers\",\"authors\":\"Zheng Song, Nan Qi, B. Chi, Zhihua Wang\",\"doi\":\"10.1109/ASPDAC.2014.6742858\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A multi-mode reconfigurable analog baseband with I/Q calibration for GNSS receivers is presented. The baseband circuit consists of an I/Q calibration circuit, a reconfigurable complex band-pass filter (C-BPF) and an AGC loop. It provides I/Q mismatch auto-calibration with the aid of a FPGA. The 3rd/ 5th-order reconfigurable C-BPF supports various bandwidths from 2.2 to 10 MHz and with different center frequencies from 3.996 to 16 MHz. The AGC loop features 5-50 dB gain range and 1 dB step, and digital AGC algorithms. The auto DC-offset cancellation is also integrated on-chip. The analog baseband circuit has been implemented in 180 nm CMOS and consumes 6.5-13 mA variable current thanks to the power scaling technique. The measured image-rejection ratio is 45-55 dB, improved by 22 dB after I/Q calibration.\",\"PeriodicalId\":234635,\"journal\":{\"name\":\"2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC)\",\"volume\":\"4 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-02-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASPDAC.2014.6742858\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASPDAC.2014.6742858","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2

摘要

提出了一种用于GNSS接收机的多模可重构模拟基带I/Q校准方法。基带电路由I/Q校准电路、可重构复杂带通滤波器(C-BPF)和AGC环路组成。它在FPGA的帮助下提供I/Q失配自动校准。3 / 5阶可重构C-BPF支持2.2 ~ 10 MHz的带宽和3.996 ~ 16 MHz的中心频率。AGC环路具有5-50 dB增益范围和1 dB步进,以及数字AGC算法。自动直流偏移抵消也集成在片上。模拟基带电路已在180 nm CMOS上实现,由于功率缩放技术,其功耗为6.5-13 mA可变电流。测量的图像抑制比为45-55 dB,经过I/Q校准后提高了22 dB。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A multi-mode reconfigurable analog baseband with I/Q calibration for GNSS receivers
A multi-mode reconfigurable analog baseband with I/Q calibration for GNSS receivers is presented. The baseband circuit consists of an I/Q calibration circuit, a reconfigurable complex band-pass filter (C-BPF) and an AGC loop. It provides I/Q mismatch auto-calibration with the aid of a FPGA. The 3rd/ 5th-order reconfigurable C-BPF supports various bandwidths from 2.2 to 10 MHz and with different center frequencies from 3.996 to 16 MHz. The AGC loop features 5-50 dB gain range and 1 dB step, and digital AGC algorithms. The auto DC-offset cancellation is also integrated on-chip. The analog baseband circuit has been implemented in 180 nm CMOS and consumes 6.5-13 mA variable current thanks to the power scaling technique. The measured image-rejection ratio is 45-55 dB, improved by 22 dB after I/Q calibration.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信