Fully-pipelined CORDIC-based FPGA Realization for a 3-DOF Hexapod-Leg Inverse Kinematics Calculation

This paper presents a CORDIC-based FPGA realization for a 3-DOF hexapod-leg inverse kinematics calculation. This architecture design proposal is approached first by an inverse kinematics equations analysis and how are these adapted to design an architecture scheme based on CORDIC operations. After that, a 3-DOF hexapod-leg working area is analyzed to get the CORDIC convergence requirements. Subsequently, we designed an iterative 32-bit floating point CORDIC entity that met the convergence and accuracy requirements. Moreover, a fully pipelined VLSI architecture is designed, respective hardware and clock signaling considerations are described in order to achieve high frequency and throughput. Finally, both results proposed and obtained through the kinematic calculations software, which included the angles equations used to calculate precision, hardware requirements and processing speed.