开关电容锁相环频率合成器

Proceedings of the Sixteenth National Radio Science Conference. NRSC'99 (IEEE Cat. No.99EX249) Pub Date : 1999-02-23 DOI:10.1109/NRSC.1999.760888

M. A. El-Ela

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引用次数: 0

摘要

介绍并分析了一种高分辨率频率合成器技术。这种技术是基于一个占空比控制振荡器电路作为分数分频器放置在一个锁相环路的反馈路径。给出了设计实例并给出了实验结果。

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Switched capacitor PLL frequency synthesizer

A technique for high resolution frequency synthesizer is introduced and analyzed. This technique is based on a duty cycle controlled oscillator circuit used as a fractional frequency divider placed in the feedback path of a phase locked loop. A design example is given with experimental results.

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Proceedings of the Sixteenth National Radio Science Conference. NRSC'99 (IEEE Cat. No.99EX249)

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