{"title":"一种快速识别匹配相关晶体管对的方法","authors":"F. Schenkel, M. Pronath, H. Graeb, K. Antreich","doi":"10.1109/CICC.2001.929802","DOIUrl":null,"url":null,"abstract":"This paper presents a new method to identify mismatch-relevant transistor pairs at the circuit level. It consists in a two-stage selection process that is derived from a sensitivity-based formulation of matching relevancy and is thus very fast. The presented results show the efficiency and effectiveness of the method.","PeriodicalId":101717,"journal":{"name":"Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-05-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"13","resultStr":"{\"title\":\"A fast method for identifying matching-relevant transistor pairs\",\"authors\":\"F. Schenkel, M. Pronath, H. Graeb, K. Antreich\",\"doi\":\"10.1109/CICC.2001.929802\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a new method to identify mismatch-relevant transistor pairs at the circuit level. It consists in a two-stage selection process that is derived from a sensitivity-based formulation of matching relevancy and is thus very fast. The presented results show the efficiency and effectiveness of the method.\",\"PeriodicalId\":101717,\"journal\":{\"name\":\"Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169)\",\"volume\":\"25 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2001-05-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"13\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICC.2001.929802\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.2001.929802","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A fast method for identifying matching-relevant transistor pairs
This paper presents a new method to identify mismatch-relevant transistor pairs at the circuit level. It consists in a two-stage selection process that is derived from a sensitivity-based formulation of matching relevancy and is thus very fast. The presented results show the efficiency and effectiveness of the method.