{"title":"一个完全集成的0.18-/spl μ m CMOS低噪声放大器,适用于2.4 ghz应用","authors":"Yu-Shing Shen, Huazhong Yang, Rong Luo","doi":"10.1109/ICASIC.2005.1611397","DOIUrl":null,"url":null,"abstract":"A low noise amplifier (LNA) with good linearity and low noise figure has been designed by 0.18/spl mu/m CMOS technology for 2.4GHz applications. The amplifier provides IIP3 of 11.8dBm and input -1dB compression point (CP) of -13.5dBm with a noise figure equal to 2.77dB, and has a forward gain of 4.5dB and power dissipation of 18mW using 1.8V supply.","PeriodicalId":431034,"journal":{"name":"2005 6th International Conference on ASIC","volume":"42 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A fully integrated 0.18-/spl mu/m CMOS low noise amplifier for 2.4-GHz applications\",\"authors\":\"Yu-Shing Shen, Huazhong Yang, Rong Luo\",\"doi\":\"10.1109/ICASIC.2005.1611397\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A low noise amplifier (LNA) with good linearity and low noise figure has been designed by 0.18/spl mu/m CMOS technology for 2.4GHz applications. The amplifier provides IIP3 of 11.8dBm and input -1dB compression point (CP) of -13.5dBm with a noise figure equal to 2.77dB, and has a forward gain of 4.5dB and power dissipation of 18mW using 1.8V supply.\",\"PeriodicalId\":431034,\"journal\":{\"name\":\"2005 6th International Conference on ASIC\",\"volume\":\"42 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2005-10-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2005 6th International Conference on ASIC\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICASIC.2005.1611397\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2005 6th International Conference on ASIC","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICASIC.2005.1611397","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
摘要
采用0.18/spl μ l /m CMOS技术,设计了一种线性度好、噪声系数低的2.4GHz低噪声放大器(LNA)。该放大器的IIP3为11.8dBm,输入-1dB压缩点(CP)为-13.5dBm,噪声系数为2.77dB,使用1.8V电源时正向增益为4.5dB,功耗为18mW。
A fully integrated 0.18-/spl mu/m CMOS low noise amplifier for 2.4-GHz applications
A low noise amplifier (LNA) with good linearity and low noise figure has been designed by 0.18/spl mu/m CMOS technology for 2.4GHz applications. The amplifier provides IIP3 of 11.8dBm and input -1dB compression point (CP) of -13.5dBm with a noise figure equal to 2.77dB, and has a forward gain of 4.5dB and power dissipation of 18mW using 1.8V supply.