一种基于双峰gmax核的65nm CMOS 230-260GHz宽带放大器

2017 Symposium on VLSI Circuits Pub Date : 2017-06-01 DOI:10.23919/VLSIC.2017.8008516

Dae-Woong Park, Dzuhri Radityo Utomo, Jong-Phil Hong, Sang-Gug Lee

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引用次数: 6

摘要

提出了一种双峰最大可达增益核心设计技术。该方法已被应用于4级宽带放大器中。该放大器采用65nm CMOS实现，带宽为30GHz (230 ~ 260GHz)，增益为12.4±1.5dB，峰值PAE为1.6%，功耗为23.8mW，相当于其他报道的200GHz以上CMOS放大器中最宽的带宽和最高的每级增益。

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A 230–260GHz wideband amplifier in 65nm CMOS based on dual-peak Gmax-core

A dual-peak maximum achievable gain core design technique is proposed. It has been adopted into a 4-stage wideband amplifier. Implemented in a 65nm CMOS, the amplifier achieves 3dB bandwidth of 30GHz (230∼260GHz), gain of 12.4±1.5dB, and peak PAE of 1.6% while dissipating 23.8mW, which corresponds to the widest bandwidth and highest gain per stage among other reported CMOS amplifiers operating above 200GHz.

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2017 Symposium on VLSI Circuits

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