{"title":"InGaAs mosfet中无结晶体管的创纪录性能","authors":"C. Zota, M. Borg, L. Wernersson, E. Lind","doi":"10.23919/VLSIT.2017.7998190","DOIUrl":null,"url":null,"abstract":"We demonstrate junctionless tri-gate MOSFETs utilizing a single layer 7 nm thick In<inf>0.80</inf>Ga<inf>0.20</inf>As (N<inf>D</inf> ∼ 1×10<sup>19</sup> cm<sup>−3</sup>) as both channel and contacts. Devices with source and drain metal separation of 32 nm and L<inf>g</inf> of 25 nm exhibit SS = 76 mV/dec., both the highest reported g<inf>m</inf> = 1.6 mS/μΑ and I<inf>on</inf> = 160 μA/μm (V<inf>DD</inf> = 0.5 V, I<inf>OFF</inf> = 100 nA/μm) for a junctionless transistor. We also examine the influence of the contact thickness, comparing double-layer junctionless devices with 37 nm thick contacts with single-layer 7 nm contact devices.","PeriodicalId":333275,"journal":{"name":"2017 Symposium on VLSI Technology","volume":"11 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-07-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Record performance for junctionless transistors in InGaAs MOSFETs\",\"authors\":\"C. Zota, M. Borg, L. Wernersson, E. Lind\",\"doi\":\"10.23919/VLSIT.2017.7998190\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We demonstrate junctionless tri-gate MOSFETs utilizing a single layer 7 nm thick In<inf>0.80</inf>Ga<inf>0.20</inf>As (N<inf>D</inf> ∼ 1×10<sup>19</sup> cm<sup>−3</sup>) as both channel and contacts. Devices with source and drain metal separation of 32 nm and L<inf>g</inf> of 25 nm exhibit SS = 76 mV/dec., both the highest reported g<inf>m</inf> = 1.6 mS/μΑ and I<inf>on</inf> = 160 μA/μm (V<inf>DD</inf> = 0.5 V, I<inf>OFF</inf> = 100 nA/μm) for a junctionless transistor. We also examine the influence of the contact thickness, comparing double-layer junctionless devices with 37 nm thick contacts with single-layer 7 nm contact devices.\",\"PeriodicalId\":333275,\"journal\":{\"name\":\"2017 Symposium on VLSI Technology\",\"volume\":\"11 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-07-31\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 Symposium on VLSI Technology\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.23919/VLSIT.2017.7998190\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 Symposium on VLSI Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/VLSIT.2017.7998190","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Record performance for junctionless transistors in InGaAs MOSFETs
We demonstrate junctionless tri-gate MOSFETs utilizing a single layer 7 nm thick In0.80Ga0.20As (ND ∼ 1×1019 cm−3) as both channel and contacts. Devices with source and drain metal separation of 32 nm and Lg of 25 nm exhibit SS = 76 mV/dec., both the highest reported gm = 1.6 mS/μΑ and Ion = 160 μA/μm (VDD = 0.5 V, IOFF = 100 nA/μm) for a junctionless transistor. We also examine the influence of the contact thickness, comparing double-layer junctionless devices with 37 nm thick contacts with single-layer 7 nm contact devices.
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