{"title":"射频基板使用封装芯片协同设计和片上校准来提高产量","authors":"A. Goyal, M. Swaminathan, A. Chatterjee","doi":"10.1109/EDAPS.2010.5683018","DOIUrl":null,"url":null,"abstract":"In this paper, yield improvement methodology is proposed for RF substrates with embedded RF passive circuitry. The proposed methodology introduces a concept of package-chip co-design and on-chip calibration of active circuitry for the yield improvement of off-chip passive embedded RF filters. RF receiver architecture for the package-chip co-design and on-chip calibration technique is presented. Using the proposed methodology, it is shown that the yield of RF substrates is improved from 88% to 98%. Also, the measurements results are presented.","PeriodicalId":185326,"journal":{"name":"2010 IEEE Electrical Design of Advanced Package & Systems Symposium","volume":"6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"RF substrates yield improvement using package-chip co-design and on-chip calibration\",\"authors\":\"A. Goyal, M. Swaminathan, A. Chatterjee\",\"doi\":\"10.1109/EDAPS.2010.5683018\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, yield improvement methodology is proposed for RF substrates with embedded RF passive circuitry. The proposed methodology introduces a concept of package-chip co-design and on-chip calibration of active circuitry for the yield improvement of off-chip passive embedded RF filters. RF receiver architecture for the package-chip co-design and on-chip calibration technique is presented. Using the proposed methodology, it is shown that the yield of RF substrates is improved from 88% to 98%. Also, the measurements results are presented.\",\"PeriodicalId\":185326,\"journal\":{\"name\":\"2010 IEEE Electrical Design of Advanced Package & Systems Symposium\",\"volume\":\"6 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 IEEE Electrical Design of Advanced Package & Systems Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EDAPS.2010.5683018\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 IEEE Electrical Design of Advanced Package & Systems Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDAPS.2010.5683018","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
RF substrates yield improvement using package-chip co-design and on-chip calibration
In this paper, yield improvement methodology is proposed for RF substrates with embedded RF passive circuitry. The proposed methodology introduces a concept of package-chip co-design and on-chip calibration of active circuitry for the yield improvement of off-chip passive embedded RF filters. RF receiver architecture for the package-chip co-design and on-chip calibration technique is presented. Using the proposed methodology, it is shown that the yield of RF substrates is improved from 88% to 98%. Also, the measurements results are presented.