Y. Takamura, Eun-Ha Kim Eun-Ha Kim, S.H. Jain, P. Griffin, J. Plummer
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The use of laser annealing to reduce parasitic series resistances in MOS devices
As the size of metal-oxide-semiconductor (MOS) devices continues to be scaled aggressively, new technologies must be developed in order to meet future device requirements. One area that faces serious challenges involves reducing the parasitic series resistances between the channel and the contact. In this work, we demonstrate that laser annealing is a potential alternative annealing technique to form ultra-shallow, low resistivity junctions. This method benefits from the ability to create abrupt, uniform dopant profiles with active concentrations that can exceed the equilibrium solubility limits. We also address some of the issues preventing its adaptation into the semiconductor-processing scheme, including the annealing of patterned structures, dopant deactivation and junction depth control.