一种用于比较器的全并行优先编码器设计

Shao-Wei Huang, Yen-Jen Chang
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引用次数: 20

摘要

在本文中,我们提出了一种可用于比较器电路的增强优先级编码器,称为全并行优先级编码器(FPPE)。由于不存在串行nand型路径,因此FPPE的性能优于传统的优先级编码器。FPPE比较器采用UMC 90纳米CMOS技术实现。仿真结果表明,该设计比基于nand型优先编码器的比较器和基于并行MSB校验比较的比较器分别快40%和12%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A full parallel priority encoder design used in comparator
In this paper, we present an enhanced priority encoder, called full parallel priority encoder (FPPE) that can be used in the comparator circuitry. Because there is no serial NAND-type path, the performance of FPPE is better than that of the conventional priority encoder. The comparator with FPPE is implemented in UMC 90nm CMOS technology. The simulation results show that the proposed design is 40% and 12% faster than the comparator based on NAND-type priority encoder and the comparator based on parallel MSB checking comparison, respectively.
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