Achieving < 1% Precision Clocking Solution with External-R under Practical Constraints

An external resistor $(R_{EXT})$ based clocking solution with $< 1\%$ precision is presented in this paper. Though $R_{EXT}$ can have much better temperature coefficient (TC), e.g. TCl $=25\text{ppm}/^{\circ}\mathrm{C}$ and negligible TC2, practical considerations in an integrated system-on-chip (SoC), such as micro-controller (MCU) opposes the benefits. For low cost SoCs, it is desired that the EXTR-pin (i.e. the pin where $R_{EXT}$ is mounted) shares a general purpose I/O pin (GPIO). Under this constraint, adjacent GPIO switching can cause significant coupling onto EXTR-pin resulting in intolerable jitter. Additionally, the shared, tri-stated GPIO adds leakage current with nonlinear temperature profile, into $R_{EXT}$ causing curvature error in frequency. These are solved by novel circuit solutions which finally help achieve the targeted precision. Measured and simulated results are provided to support the claims.