{"title":"改善SiGe EPI工艺位错的方法","authors":"Xiangguo Meng, Quanbo Li, Jun Huang, A. Pang","doi":"10.1109/CSTIC.2015.7153377","DOIUrl":null,"url":null,"abstract":"To obtain a defect free and dislocation free during SiGe deposition is the key for improving hole carrier mobility for 40 nm technology node and beyond. This paper presents a methodology to eliminate SiGe dislocation. The key step is to introduce SF6 during Si trench surface treatment after Si trench main etch.","PeriodicalId":130108,"journal":{"name":"2015 China Semiconductor Technology International Conference","volume":"10 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Method of improving dislocation for SiGe EPI process\",\"authors\":\"Xiangguo Meng, Quanbo Li, Jun Huang, A. Pang\",\"doi\":\"10.1109/CSTIC.2015.7153377\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"To obtain a defect free and dislocation free during SiGe deposition is the key for improving hole carrier mobility for 40 nm technology node and beyond. This paper presents a methodology to eliminate SiGe dislocation. The key step is to introduce SF6 during Si trench surface treatment after Si trench main etch.\",\"PeriodicalId\":130108,\"journal\":{\"name\":\"2015 China Semiconductor Technology International Conference\",\"volume\":\"10 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-03-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 China Semiconductor Technology International Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CSTIC.2015.7153377\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 China Semiconductor Technology International Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CSTIC.2015.7153377","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Method of improving dislocation for SiGe EPI process
To obtain a defect free and dislocation free during SiGe deposition is the key for improving hole carrier mobility for 40 nm technology node and beyond. This paper presents a methodology to eliminate SiGe dislocation. The key step is to introduce SF6 during Si trench surface treatment after Si trench main etch.
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