一个0.13 CMOS集成电路的电阻抗光谱从1千赫到10千兆赫

2017 30th IEEE International System-on-Chip Conference (SOCC) Pub Date : 2017-09-01 DOI:10.1109/SOCC.2017.8226022

R. García-Ramírez, A. Chacón-Rodríguez, R. Rímolo-Donadío

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引用次数: 1

摘要

提出了一种基于0.13 μm CMOS技术、功能频率范围为1kHz ~ 10ghz的电阻抗谱采集与处理系统的设计方案。该系统基于锁相结构中的正交调制器。对系统各个模块的设计进行了说明，并采用布局后仿真来验证设计的主要特征，如频率响应、增益、噪声、线性度和误差表征。

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A 0.13 CMOS integrated circuit for electrical impedance spectroscopy from 1 kHz to 10 GHz

The design of an electrical impedance spectroscopy acquisition and processing system using a 0.13 μm CMOS technology with a 1kHz to 10 GHz functional frequency range is presented. The system is based on a quadrature modulator in a lock-in architecture. The design of each one of the modules of the system is explained, and post-layout simulations are used to validate the main features of the design such as frequency response, gain, noise, linearity, and error characterization.

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2017 30th IEEE International System-on-Chip Conference (SOCC)

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