图像处理器能够以30帧/秒的速度进行无块噪声JPEG2000压缩，适用于数码相机应用

2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC. Pub Date : 2003-02-09 DOI:10.1109/ISSCC.2003.1234201

H. Yamauchi, S. Okada, K. Taketa, T. Ohyama, Y. Matsuda, T. Mori, T. Watanabe, Y. Matsuo, Y. Yamada, T. Ichikawa, Y. Matsushita

{"title":"图像处理器能够以30帧/秒的速度进行无块噪声JPEG2000压缩，适用于数码相机应用","authors":"H. Yamauchi, S. Okada, K. Taketa, T. Ohyama, Y. Matsuda, T. Mori, T. Watanabe, Y. Matsuo, Y. Yamada, T. Ichikawa, Y. Matsushita","doi":"10.1109/ISSCC.2003.1234201","DOIUrl":null,"url":null,"abstract":"A one-chip image processor for next-generation digital cameras and broadband PDA multimedia mobile phones is described. It is capable of processing JPEG2000 data with 30 frames/s and a 27 MHz operating frequency. The process is fabricated in 0.25 /spl mu/m CMOS and contains 8.5M transistors in a 103 mm/sup 2/ area.","PeriodicalId":171288,"journal":{"name":"2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.","volume":"27 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-02-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"38","resultStr":"{\"title\":\"Image processor capable of block-noise-free JPEG2000 compression with 30 frames/s for digital camera applications\",\"authors\":\"H. Yamauchi, S. Okada, K. Taketa, T. Ohyama, Y. Matsuda, T. Mori, T. Watanabe, Y. Matsuo, Y. Yamada, T. Ichikawa, Y. Matsushita\",\"doi\":\"10.1109/ISSCC.2003.1234201\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A one-chip image processor for next-generation digital cameras and broadband PDA multimedia mobile phones is described. It is capable of processing JPEG2000 data with 30 frames/s and a 27 MHz operating frequency. The process is fabricated in 0.25 /spl mu/m CMOS and contains 8.5M transistors in a 103 mm/sup 2/ area.\",\"PeriodicalId\":171288,\"journal\":{\"name\":\"2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.\",\"volume\":\"27 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2003-02-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"38\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.2003.1234201\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.2003.1234201","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 38

摘要

介绍了一种用于下一代数码相机和宽带PDA多媒体移动电话的单片图像处理器。它能够以30帧/秒和27 MHz的工作频率处理JPEG2000数据。该工艺在0.25 /spl μ m CMOS中制造，在103 mm/sup /面积中包含8.5M晶体管。

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Image processor capable of block-noise-free JPEG2000 compression with 30 frames/s for digital camera applications

A one-chip image processor for next-generation digital cameras and broadband PDA multimedia mobile phones is described. It is capable of processing JPEG2000 data with 30 frames/s and a 27 MHz operating frequency. The process is fabricated in 0.25 /spl mu/m CMOS and contains 8.5M transistors in a 103 mm/sup 2/ area.

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来源期刊

2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.

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