基于0.13μm CMOS技术的4-6GHz宽带LNA设计

S. Arshad, F. Zafar, Q. Wahab
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引用次数: 2

摘要

本文介绍了一种单端宽带LNA的设计,利用输入端和输出端的无功元件进行阻抗匹配。仿真结果表明,LNA架构采用了与窄带设计相似的元件,但实现了更宽的带宽、高增益和低噪声系数。该单端宽带LNA基于IBM的0.13 μm CMOS技术,并在Cadence SpectreRF中进行了仿真。LNA工作频率大约在4-6 GHz之间。LNA的最大增益为29.6 dB,平均NF为2.6 dB。线性分析表明,输入参考PldB和IIP3分别为-25.07 dBm和-13.47 dBm。两级宽带LNA在1.5 V电源下仅消耗13.9 mA。它与其他设计用于4- 6ghz范围的具有更高增益和更小NF的lna进行了良好的比较。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Design of a 4–6GHz wideband LNA in 0.13μm CMOS technology
This paper presents the design of a single ended wideband LNA utilizing reactive elements at the input and output for impedance matching. It has been shown through simulations that the LNA architecture utilizes components similar to a narrowband design but achieves a much wider bandwidth with high gain and low noise figure. The single ended wideband LNA is based on 0.13-μm CMOS technology from IBM and simulated in Cadence SpectreRF. The LNA operates for frequencies approximately between 4-6 GHz. The maximum gain of the LNA is 29.6 dB and average NF is 2.6 dB. The linearity analysis shows the input referred PldB and IIP3 of -25.07 dBm and -13.47 dBm respectively. The two stage wideband LNA consumes only 13.9 mA from a 1.5 V supply. It shows good comparison with other LNAs designed for 4-6 GHz range with a much higher gain and smaller NF.
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