肖特基势垒MOSFET超低功耗实时神经元的神经形态计算

2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM) Pub Date : 2023-03-07 DOI:10.1109/EDTM55494.2023.10103118

Shubham Patil, J. Sakhuja, Ashutosh Kumar Singh, Anmol Biswas, V. Saraswat, Surinder Kumar, S. Lashkare, U. Ganguly

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引用次数: 0

摘要

高效能的实时突触和神经元是实现大规模神经形态计算的必要条件。在本文中，我们提出并演示了基于肖特基势垒mosfet的超低功率压控电流源，使实时神经元能够用于神经形态计算。肖特基势垒MOSFET是在绝缘体上的硅平台上制造的，多晶硅作为通道，镍/铂作为源极/漏极。Poly-Si和镍制成背靠背的肖特基结，使节能神经元所需的超低ON电流成为可能。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Schottky Barrier MOSFET Enabled Ultra-Low Power Real-Time Neuron for Neuromorphic Computing

Energy-efficient real-time synapses and neurons are essential to enable large-scale neuromorphic computing. In this paper, we propose and demonstrate the Schottky-Barrier MOSFET-based ultra-low power voltage-controlled current source to enable real-time neurons for neuromorphic computing. Schottky-Barrier MOSFET is fabricated on a Silicon-on-insulator platform with polycrystalline Silicon as the channel and Nickel/Platinum as the source/drain. The Poly-Si and Nickel make the back-to-back Schottky junction enabling ultra-low ON current required for energy-efficient neurons.

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2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM)

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