Design and simulation of PLL frequency synthesizer for LTE mobile communications

In this article, we present the design of frequency synthesizer for mobile terminals operating in the transmit band [1850–1910] MHz and the reception band [1930–1990] MHz used by the fourth generation networks (LTE). The proposed architecture offers improved switching time of the order of 27.78 microseconds for 60 MHz frequency jump corresponding to the entire width of the emission band bandwidth using a third order low-pass filter. The transfer functions in open and closed loop were presented. Also, we showed the various phase noise sources of each component constituting the frequency synthesizer and theirs effects on its RF output.