基于FPGA的高速安全变概率伪/真随机数发生器

A. Marghescu, P. Svasta, E. Simion
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引用次数: 8

摘要

随机数生成器广泛应用于密码学、游戏开发、人工智能等领域。作为一些安全(密码)协议的引擎,好的、安全的随机数生成器的开发引起了世界范围内研究界的关注。随机数生成器分为两类:真随机数生成器(基于物理非确定性过程,如振荡器的抖动)和伪随机数生成器(基于数学属性,其中时刻t的输出以某种方式基于时刻t-1的输出)。众所周知,随机数生成器(True或Pseudo)的输出分布倾向于50%。在某些特殊情况下,这种概率必须是不同的(其中一些情况将在这里描述),本文将提出一种获得这种概率的方法。本文的新颖之处在于在经典的Gollmann级联PRNG的基础上提出了一种新的方法,并以此为基础,开发了一种FPGA实现来提高其安全性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
High speed and secure variable probability Pseudo/True Random Number Generator using FPGA
Random numbers generators are widely used in different fields like cryptography, gaming development, artificial intelligence, etc. Being the engine of some security (cryptographic) protocols, the development of good and secure Random Number Generators aroused the attention of the research communities worldwide. Random Number Generators split into two categories: True Random Number Generators (based on physical non-deterministic processes, like the jitter of an oscillator) and Pseudo Random Number Generators (based on mathematical properties, where the output at the time t is based somehow on the output on time t-1). It is well known that the output distribution of a Random Number Generator (either True or Pseudo) output tends toward 50%. There are some particular cases where this probability must be different (some of these situations will be described here) and this paper will present a way of obtaining this. The novelty of this paper is based on a new approach on the classic Gollmann Cascade PRNG and starting from this, the development of a FPGA implementation to increase its security.
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