单片机用CMOS施密特触发电路对nd模式ESD的弱点及改进

2006 IEEE International Conference on Semiconductor Electronics Pub Date : 2006-11-01 DOI:10.1109/SMELEC.2006.380693

Jae-Seong Jeong, Jung-Min Lee, Sang-Deuk Park

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引用次数: 0

摘要

本研究探讨了嵌入式微控制器中CMOS施密特触发电路的nd模式ESD的弱点和改进。CMOS Schmitt触发电路NMOS的结峰条件为Vcc共模、nd模1.4 kV和0.8 ~ 1.2秒(引脚到引脚)。再现了在CMOS施密特触发电路中形成的LNPN作用的失效机理。我们已经确定了根本原因，并改进了电路，以实现无ESD损坏。

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Weak point and improvement of CMOS Schmitt Trigger Circuit used in Microcontroller about ND-mode ESD

In this study, We investigated weak point and improvement about ND-mode ESD of CMOS Schmitt trigger circuit embeded in Microcontroller. Junction spiking conditions on NMOS of the CMOS Schmitt trigger circuit were Vcc Common mode, ND-mode 1.4 kV, and 0.8-1.2 sec zap interval (pin to pin). Failure mechanism by LNPN action formed in CMOS Schmitt trigger circuit was reproduced. We have identified Root Cause and improved circuits to achieve ESD damage free.

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2006 IEEE International Conference on Semiconductor Electronics

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