在测试最少的加法器上

S. Kajihara, Tsutomu Sasao
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引用次数: 18

摘要

本文研究了两种n位加法器,纹波进位加法器和级联进位预判加法器,并对卡在故障模型进行了最小测试。在第一部分中,我们提出了两种由五个门组成的全加法器,并展示了它们的极小性。我们还证明了一个全加法器可以只用三个测试模式来测试单个故障卡滞。我们还提出了两种类型的4位进位预加法器及其最小馀量。在第二部分中,我们考虑了级联加法器、n位纹波进位加法器和4m位级联进位前置加法器的测试。这些测试比以前发表的测试要小得多。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
On the adders with minimum tests
This paper considers two types of n-bit adders, ripple carry adders and cascaded carry look-ahead adders, with minimum tests for stuck-at-fault models. In the first part, we present two types of full adders consisting of five gates, and show their minimality. We also prove that one of the full adders can be tested by only three test patterns for single stuck-at-faults. We also present two types of 4-bit carry look-ahead adders and their minimum rests. In the second part, we consider the tests for the cascaded adders, an n-bit ripple carry adder and a 4m-bit cascaded carry look-ahead adders. These tests are considerably smaller than previously published ones.
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