高速串行背板母线中不同类型差分传输线的差分插入损耗和确定性抖动

H. Osaka, Y. Uematsu, K. Yamamoto, H. Kanai, N. Chujo
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引用次数: 0

摘要

为了优先考虑传输线的设计规范,我们在2 Gbps的串行背板总线上测量了主板上三种类型的差分传输线的差分插入损耗和确定性抖动。我们测试了三种具有不同共同阻抗的线宽,同时将差分阻抗保持在100 ω左右,并且通过孔改变信号的开放短段长度。在微带线中,损耗和抖动与线宽有轻微的关系;然而,在带状线中,即使在背板上的线路阻抗或通孔的开孔长度不匹配时,损耗也与线宽有关,确定性抖动几乎随带状线损耗的减小而线性减小。因此,在低抖动情况下,主板差分带状线对的损耗设计比阻抗设计更为重要。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Differential insertion loss and deterministic jitter for different types of differential transmission lines in high-speed serial backplane bus
We measured the differential insertion loss and the deterministic jitter for three types of differential transmission lines on a motherboard in a serial backplane bus at 2 Gbps in order to prioritize the design specifications for transmission lines. We tested three line widths having different common impedances of the lines while keeping the differential impedance at about 100 Omega, moreover varied the open stub lengths of the signal via holes. In the microstrip line, the loss and the jitter slightly depended on the line width; however, in the stripline, the loss depended on the line width and the deterministic jitter decreased almost linearly as the loss of the stripline decreased even when the impedance of the lines or the open stub length of the via holes was mismatched on the backplane. Therefore, loss design of a differential stripline pair on a motherboard is more important than impedance design in the low jitter.
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