K. Lee, Li Zhang, B. Wang, S. C. Goh, Shuyu Bao, Yue Wang, W. A. Sasangka, K. Lee, E. Fitzgerald, C. S. Tan
{"title":"通过多晶圆堆叠集成Si-CMOS和III-V材料","authors":"K. Lee, Li Zhang, B. Wang, S. C. Goh, Shuyu Bao, Yue Wang, W. A. Sasangka, K. Lee, E. Fitzgerald, C. S. Tan","doi":"10.1109/S3S.2017.8309243","DOIUrl":null,"url":null,"abstract":"A method to integrate III-V compound semiconductors (e.g., GaN HEMT, InGaN LED, InGaAs HEMT or AlGaInP LED) and Si-CMOS on a common Si substrate is demonstrated. The Si-CMOS layer from SOI wafer is temporarily held on a Si handle wafer. Another III-V/Si substrate is then bonded to the Si-CMOS containing handle wafer. Finally, the handle wafer is released to realize the Si-CMOS on III-V/Si substrate. Additional III-V/Si substrates with different materials and structures can be integrated on the same piece of Si-CMOS+III-V/Si substrate by stacking another III-V/Si substrate before the handle wafer is removed. Through this method, integration of Si-CMOS with more than one type of III-V materials on a single Si platform can be realized (e.g., CMOS/InGaAs HEMT/GaN LED on a silicon substrate). Hence, a new generation of system with diversed functionalities, better energy efficiency, and smaller form factor can be achieved.","PeriodicalId":333587,"journal":{"name":"2017 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Integration of Si-CMOS and III-V materials through multi-wafer stacking\",\"authors\":\"K. Lee, Li Zhang, B. Wang, S. C. Goh, Shuyu Bao, Yue Wang, W. A. Sasangka, K. Lee, E. Fitzgerald, C. S. Tan\",\"doi\":\"10.1109/S3S.2017.8309243\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A method to integrate III-V compound semiconductors (e.g., GaN HEMT, InGaN LED, InGaAs HEMT or AlGaInP LED) and Si-CMOS on a common Si substrate is demonstrated. The Si-CMOS layer from SOI wafer is temporarily held on a Si handle wafer. Another III-V/Si substrate is then bonded to the Si-CMOS containing handle wafer. Finally, the handle wafer is released to realize the Si-CMOS on III-V/Si substrate. Additional III-V/Si substrates with different materials and structures can be integrated on the same piece of Si-CMOS+III-V/Si substrate by stacking another III-V/Si substrate before the handle wafer is removed. Through this method, integration of Si-CMOS with more than one type of III-V materials on a single Si platform can be realized (e.g., CMOS/InGaAs HEMT/GaN LED on a silicon substrate). Hence, a new generation of system with diversed functionalities, better energy efficiency, and smaller form factor can be achieved.\",\"PeriodicalId\":333587,\"journal\":{\"name\":\"2017 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)\",\"volume\":\"42 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/S3S.2017.8309243\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/S3S.2017.8309243","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Integration of Si-CMOS and III-V materials through multi-wafer stacking
A method to integrate III-V compound semiconductors (e.g., GaN HEMT, InGaN LED, InGaAs HEMT or AlGaInP LED) and Si-CMOS on a common Si substrate is demonstrated. The Si-CMOS layer from SOI wafer is temporarily held on a Si handle wafer. Another III-V/Si substrate is then bonded to the Si-CMOS containing handle wafer. Finally, the handle wafer is released to realize the Si-CMOS on III-V/Si substrate. Additional III-V/Si substrates with different materials and structures can be integrated on the same piece of Si-CMOS+III-V/Si substrate by stacking another III-V/Si substrate before the handle wafer is removed. Through this method, integration of Si-CMOS with more than one type of III-V materials on a single Si platform can be realized (e.g., CMOS/InGaAs HEMT/GaN LED on a silicon substrate). Hence, a new generation of system with diversed functionalities, better energy efficiency, and smaller form factor can be achieved.