具有密集耦合的互连模型的可实现化简

Pekka Miettinen, M. Honkala, M. Valtonen, J. Roos
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引用次数: 3

摘要

本文提出了一种模型阶降法,用于降低可能存在密集电感耦合和电容耦合的互连电路。该方法采用分划法将原始电路分割成小块,然后用低阶降阶模型(ROMs)精确逼近。通过使用低阶rom,可以在标准RLCK实现中使用正值宏模型。对于电感耦合和电容耦合,采用两级分别减小耦合。这样可以有效地分散耦合效应。通过65纳米节点的测试仿真验证了该方法的有效性,结果表明该方法在CPU加速和生成误差方面具有良好的降低效果。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Realizable reduction of interconnect models with dense coupling
This paper describes a model-order reduction (MOR) method to reduce an interconnect circuit with possibly dense inductive and capacitive coupling. The method uses partitioning to divide the original circuit into small parts that can be then approximated accurately with low-order reduced-order models (ROMs). The use of low-order ROMs enables the use of positive-valued macromodels with standard RLCK realization. The coupling is reduced with a two-stage reduction separately for the inductive and capacitive coupling. This allows for efficient sparsification of the coupling effect. The method is verified with test simulations of the 65-nm technology node and is shown to produce good reduction results in terms of CPU speedup and generated error.
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