{"title":"隧道纳米线场效应管的紧凑模型及性能评估","authors":"P. Solomon, D. Frank, S. Koswatta","doi":"10.1109/DRC.2011.5994495","DOIUrl":null,"url":null,"abstract":"A compact model is presented which realistically reproduces TFET characteristics and allows complex circuit simulation and parameter optimization studies. The model has been applied to circuit simulations which reveal anomalous switching behavior, and to a multi-parameter optimization study which quantifies the power-performance advantage of the TFET over conventional MOSFETs.","PeriodicalId":107059,"journal":{"name":"69th Device Research Conference","volume":"15 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-06-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"26","resultStr":"{\"title\":\"Compact model and performance estimation for tunneling nanowire FET\",\"authors\":\"P. Solomon, D. Frank, S. Koswatta\",\"doi\":\"10.1109/DRC.2011.5994495\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A compact model is presented which realistically reproduces TFET characteristics and allows complex circuit simulation and parameter optimization studies. The model has been applied to circuit simulations which reveal anomalous switching behavior, and to a multi-parameter optimization study which quantifies the power-performance advantage of the TFET over conventional MOSFETs.\",\"PeriodicalId\":107059,\"journal\":{\"name\":\"69th Device Research Conference\",\"volume\":\"15 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-06-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"26\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"69th Device Research Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DRC.2011.5994495\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"69th Device Research Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DRC.2011.5994495","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Compact model and performance estimation for tunneling nanowire FET
A compact model is presented which realistically reproduces TFET characteristics and allows complex circuit simulation and parameter optimization studies. The model has been applied to circuit simulations which reveal anomalous switching behavior, and to a multi-parameter optimization study which quantifies the power-performance advantage of the TFET over conventional MOSFETs.