1.8V 9bit 10MS/s SAR ADC, 0.18µm CMOS,用于生物阻抗分析

Daniele Santana, H. Hernández, W. Noije
{"title":"1.8V 9bit 10MS/s SAR ADC, 0.18µm CMOS,用于生物阻抗分析","authors":"Daniele Santana, H. Hernández, W. Noije","doi":"10.1109/LASCAS.2019.8667565","DOIUrl":null,"url":null,"abstract":"In this work a 9-bits low power 10MS/s asynchronous SAR ADC in 180nm CMOS tecnology is presented. The ADC core occupies an active area of 0.124mm2. The ADC main parameters were extracted from post-layout simulations, which resulted in SNR of 55.29dB and ENOB of 8.59 bit at 1.8Vsupply and a sampling frequency of 10MS/s while consuming 0.692mW. The Figure of Merit (FoM) obtained was 145.93 fJ/conversion-step","PeriodicalId":142430,"journal":{"name":"2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A 1.8V 9bit 10MS/s SAR ADC in 0.18µm CMOS for bioimpedance analysis\",\"authors\":\"Daniele Santana, H. Hernández, W. Noije\",\"doi\":\"10.1109/LASCAS.2019.8667565\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this work a 9-bits low power 10MS/s asynchronous SAR ADC in 180nm CMOS tecnology is presented. The ADC core occupies an active area of 0.124mm2. The ADC main parameters were extracted from post-layout simulations, which resulted in SNR of 55.29dB and ENOB of 8.59 bit at 1.8Vsupply and a sampling frequency of 10MS/s while consuming 0.692mW. The Figure of Merit (FoM) obtained was 145.93 fJ/conversion-step\",\"PeriodicalId\":142430,\"journal\":{\"name\":\"2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS)\",\"volume\":\"36 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-02-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/LASCAS.2019.8667565\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/LASCAS.2019.8667565","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

本文提出了一种采用180nm CMOS技术的9位低功耗10MS/s异步SAR ADC。ADC核心占据0.124mm2的有效面积。从布局后仿真中提取出ADC的主要参数,在1.8 v电源、10MS/s采样频率和0.692mW功耗下,实现了55.29dB的信噪比和8.59 bit的ENOB。所得的优值(FoM)为145.93 fJ/转换步
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A 1.8V 9bit 10MS/s SAR ADC in 0.18µm CMOS for bioimpedance analysis
In this work a 9-bits low power 10MS/s asynchronous SAR ADC in 180nm CMOS tecnology is presented. The ADC core occupies an active area of 0.124mm2. The ADC main parameters were extracted from post-layout simulations, which resulted in SNR of 55.29dB and ENOB of 8.59 bit at 1.8Vsupply and a sampling frequency of 10MS/s while consuming 0.692mW. The Figure of Merit (FoM) obtained was 145.93 fJ/conversion-step
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